ATTINY402 I2C slave max. speed vs. Fclk Periph I connected ATTINY404 directly to I2C from FT4232H. The problem persists, but I was able to measure what was happening. ATTINY keeps the SCL on Low for the duration of the...
Friday, 14 January 2022 - 14:29
ATTINY402 I2C slave max. speed vs. Fclk Periph Post your code, please.
I tested following combinations:
1. 20MHz with div2 and SCL 100kHz - OK
2. 20MHz with div4 and SCL 100kHz - Fail
3. 20MHz with div6 and SCL 25kHz -...
I connected ATTINY404 directly to I2C from FT4232H. The problem persists, but I was able to measure what was happening. ATTINY keeps the SCL on Low for the duration of the...
Post your code, please. I tested following combinations: 1. 20MHz with div2 and SCL 100kHz - OK 2. 20MHz with div4 and SCL 100kHz - Fail 3. 20MHz with div6 and SCL 25kHz -...
I went through it several times and I don't see a mistake. Write step by step what you would do.
JTAG ICE 3 connected to UPDI.
Master (FT4232H) read from Slave (ATTINY402).
#include <avr/io.h> #include <avr/interrupt.h> #define I2C_ADDRESS 0x80 #define SDATA_LENGHT 4 volatile uint8_t sended; volatile unsigned char sdata[2] [...