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Set pointer to array address with inline ASM in naked ISR
El Tangas wrote:edit: more explicitly, you can do this to get the address of tx_buf into the registers: Thank you, that was it.
Monday, 2 December 2019 - 23:09
Set pointer to array address with inline ASM in naked ISR
No, they represent in some way the address of the array "tx_buf" (high and low bytes I guess) and that address is stored into tx_at (see the C line before the ASM statement).
Monday, 2 December 2019 - 20:27
Set pointer to array address with inline ASM in naked ISR
Okay, no inline asm now. Moved my code that I have so far to a separate .S file and "imported" the variables I need with ".extern ..." works fine so far. C is not an option,...
Monday, 2 December 2019 - 19:38
Tight ATMEGA328P SPI Timing
jaksel wrote: Also it seems you are mixing up SPI clock frequency and data rate. They are typically not the same. You need byte-to-byte delay and probably also a period of...
Saturday, 30 November 2019 - 11:45
Tight ATMEGA328P SPI Timing
I know, but the system is only double buffered in receive direction as the datasheet says, not in transmit direction and that is the problem here. From the datasheet: This means...
Friday, 29 November 2019 - 22:41
Tight ATMEGA328P SPI Timing
That's basically what I was trying to say with aquaatic wrote:That translates to max. 16 instructions at 16MHz. Bummer. Guess I can't practically go so fast   But speaking of...
Friday, 29 November 2019 - 22:30
Tight ATMEGA328P SPI Timing
Yes. That totally makes sense. I also tried out a different clock frequency and it appears that the difference between the last falling edge of one byte and the toggling of D2 is...
Friday, 29 November 2019 - 21:41
Tight ATMEGA328P SPI Timing
It is connected to D2, which is toggled with PORTD = ~PORTD;
Friday, 29 November 2019 - 19:43
Tight ATMEGA328P SPI Timing
I checked that, the Atmega (Slave), Raspberry (Master) as well as the logic analyzer software is set to SPI Mode 0.
Friday, 29 November 2019 - 19:20