Post Created date
strange problem with WINAVR20080402
ok, i got it, after installed WINAVR20080411, it works, now.
Wednesday, 16 April 2008 - 11:28
mutex by AVR32 instruction set
ok: U8 i = 0; int main(void) { ... __sync_bool_compare_and_swap(&i, 0, 1); ... }
Monday, 14 April 2008 - 20:08
mutex by AVR32 instruction set
avr32-gcc (GCC) 4.2.2-atmel.1.0.8 (mingw32 special) This is mine.
Monday, 14 April 2008 - 16:48
mutex by AVR32 instruction set
I tried __sync_bool_compare_and_swap and __sync_lock_test_and_set in my AVR32 code, but the compiler can't compile them. Severity and Description Path Resource Location...
Monday, 14 April 2008 - 14:39
mutex by AVR32 instruction set
where is this __builtin_sync???
Sunday, 13 April 2008 - 20:25
a issue with SPI's CS delay control (DLYBCT)
ok, thanks, squidgit
Friday, 11 April 2008 - 07:48
a issue with SPI's CS delay control (DLYBCT)
ok, good to know this. All I want is a 25ns delay, and I can only get at least 33clks...
Thursday, 10 April 2008 - 13:45
a issue with SPI's CS delay control (DLYBCT)
anyone knows?
Wednesday, 9 April 2008 - 22:04
Anyone have samples of Rev. H UC3A parts yet?
where can you buy the UC3A now?
Wednesday, 9 April 2008 - 10:42
Packed structures
everything sounds fine. Are you sure you used: __attribute__ ((packed)) in your structure declaration?
Wednesday, 9 April 2008 - 10:39
sync the GCLK0 output and RK output of SSC to F_CPU/32
ok, I found the reason. It's because the GCLK in disable mode always keep its prescaler reset. So I just need to enable SOC0 and select it as main clock and then set and enable...
Monday, 31 March 2008 - 09:03
sync the GCLK0 output and RK output of SSC to F_CPU/32
ok, I will try with COUNT register again, thanks.
Monday, 31 March 2008 - 07:57

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