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SAMD21G18A TCC2 is missing dith feature I have a problem with generation of dithered PWM on timer TCC2. Sample code is as follows TCC0_PER = 1 << 4 | 0; // period TCC0_CCA = 1 << 4 | 1; // duty1... |
Monday, 8 August 2022 - 18:04 |
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XMEGA event system-timer hardware problem Initial setup is as follows: TCD1 serves as a prescaler, that clocks TCC0 via EVENT SYSTEM channel 4. Everything works perfect except the only moment: if you stop... |
Friday, 22 July 2022 - 17:41 |
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How to insert ISR handler directly into Vector table Dear guru, please advice how to modify vector table code. Currently I have standard vector table and standard interrupt handler ISR(PORTE_INT0_vect, ISR_NAKED) {... |
Wednesday, 13 July 2022 - 13:31 |
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XMEGA128, How to address flash memory beyond 64k limit I have several data arrays located in flash. While these arrays stay beyond 64k, everything is OK, because pointers are 16 bit and code works uint32_t addr; addr = &... |
Tuesday, 31 August 2021 - 14:15 |
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XMEGA128A1U chip damage Assembled board worked fine for about 3 years, then something happened. Customer provides no detail. Board was mounted on internal side of some metal box, and that box... |
Wednesday, 7 July 2021 - 11:21 |
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ATSAMC21N support for Atmel Studio 6 Hi! I need to add ATSAMC21N18N device to AS6. Atmel (Microchip) happily provides such an opportunity https://www.microchip.com/mplab/... (provided link on... |
Friday, 29 May 2020 - 09:31 |
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XMEGA128A1U DMA problem (solved) Dear freaks, my task is to copy one (e.g. 8-byte) array to another using DMA module on XMEGA128A1U. Result: destination array gets filled with very first byte from source.... |
Thursday, 28 September 2017 - 21:25 |
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CRC-8 with XMEGA A Hi, all, XMEGA A has a hardware module that can do CRC-16 and CRC-32 for byte stream. I need CRC-8 as well. Maybe someone could advise a way to calculate CRC-8,... |
Tuesday, 4 August 2015 - 23:37 |
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xmega128a1u PORTCFG_EVOUTSEL is not written Hi everybody! XMEGA chip allows to output event signal to pin 7 of PORTC, PORTD or PORTE. Assume that PORTC is used and event is simply system clock, divided by 16. If I use event... |
Sunday, 3 August 2014 - 15:12 |
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XMEGA EBI multiple CS problem Hi everybody! My question is about EBI in SRAM mode for XMEGA128A1. When I setup CS0 line for address 0x20000..0x2FFFF and CS1 line for address 0x30000..0x3FFFF (non-overlapping... |
Monday, 7 July 2014 - 11:10 |