8 byte alignment theusch wrote:
Don't we need to know the toolchain and target first?
[I'll wager a virtual cold one that this is not an AVR target. I wish we could all...
Saturday, 11 July 2020 - 01:26
8 byte alignment Kartman wrote:
Rather than 'fixing' the problem after the fact, write a safe_malloc with a parameter for alignment. On a 32bit micro the default alignment should be 32bit anyways...
simple assembly help Found it. The Stack pointers are properly initialized for each execution mode.
Slán Guys.
Thursday, 9 July 2020 - 22:43
simple assembly help Okay, tested everything. It appears that when an interrupt occurs the status register (I think) is being trashed when in system mode.
Thursday, 9 July 2020 - 21:42
simple assembly help Tested the context in isolation, it works. That only leaves the interrupt context switch. I'll look into it on Friday. For now, I'm going on the rip. ...
Wednesday, 8 July 2020 - 16:55
simple assembly help I'm actually looking at the:
SPSR_cxsfit should be CPSR_cxsf for system mode.
Wednesday, 8 July 2020 - 14:49
simple assembly help Okay, last problem is after a context switch the task fails on floating point operations? The context switch is as follows:
__attribute__((naked))void context_switch (void...
Tuesday, 7 July 2020 - 21:04
simple assembly help Okay, I've the code for initialising the FPU, see below:
/* Enable fpu */
/* Grant non secure access for CP10 and CP11 */
asm volatile (
"mrc p15, 0, r0, c1, c1, 2\n\t...
Tuesday, 7 July 2020 - 01:03
simple assembly help This might be a solution... https://developer.arm.com/documentation/ddi0449/b/programmers-model/about-the-programmers-model/enabling-vfp-support
I'll post tomorrow the...
Sunday, 5 July 2020 - 19:19
what system calls would you like to see in an RTOS awneil wrote:
Fianawarrior wrote:it was moved
To where it belongs!
Fianawarrior wrote:This question is a general question on all microchip MCU/MPU
No it isn't - what...
Thursday, 2 July 2020 - 21:38
creating a task context Maybe I will not have to resort to the debugger, I found two or three errors in the function that creates the task. See below, I'll not be able to test it until tomorrow....
theusch wrote: Don't we need to know the toolchain and target first? [I'll wager a virtual cold one that this is not an AVR target. I wish we could all...
Kartman wrote: Rather than 'fixing' the problem after the fact, write a safe_malloc with a parameter for alignment. On a 32bit micro the default alignment should be 32bit anyways...
I might have not declared enough memory on the stack! I'll know tomorrow.
Found it. The Stack pointers are properly initialized for each execution mode. Slán Guys.
Okay, tested everything. It appears that when an interrupt occurs the status register (I think) is being trashed when in system mode.
Tested the context in isolation, it works. That only leaves the interrupt context switch. I'll look into it on Friday. For now, I'm going on the rip. ...
I'm actually looking at the: SPSR_cxsfit should be CPSR_cxsf for system mode.
Okay, last problem is after a context switch the task fails on floating point operations? The context switch is as follows: __attribute__((naked))void context_switch (void...
Okay, I've the code for initialising the FPU, see below: /* Enable fpu */ /* Grant non secure access for CP10 and CP11 */ asm volatile ( "mrc p15, 0, r0, c1, c1, 2\n\t...
This might be a solution... https://developer.arm.com/documentation/ddi0449/b/programmers-model/about-the-programmers-model/enabling-vfp-support I'll post tomorrow the...
awneil wrote: Fianawarrior wrote:it was moved To where it belongs! Fianawarrior wrote:This question is a general question on all microchip MCU/MPU No it isn't - what...
Maybe I will not have to resort to the debugger, I found two or three errors in the function that creates the task. See below, I'll not be able to test it until tomorrow....
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