SAMD21 CDC - How do I know when host port is closed? within the udc_cdc.c file I created a function to achieve this as a temporary work around:
bool usb_cdc_data_available(uint16_t size) {
uint8_t buf_sel =...
Tuesday, 18 June 2019 - 01:35
Code detection when SAMD21 is debugging You put an idea into my head, I did a bit more reading now that I knew what I was looking for in the datasheet. Turns out the SAMD21 datasheet recommends looking at the Armv5...
Thursday, 16 May 2019 - 01:03
SAMD09 DMA SPI Slave Device with Continuous Data Stream For people in the future I can't get the full circular going yet with multi descriptors, but if you set the "next_descriptor" member of your function to itself, it should work...
Thursday, 17 January 2019 - 04:34
Converting SAMD21J18 to SAMD21E18 Usb Host MSD Project Updates:
I got a usb cdc echo example working. This leads me to believe there is something wrong with their driver.
I started playing around with my samd21 xpro with all...
Wednesday, 28 November 2018 - 01:18
Have to Vent about PICs Someone finally have the same experience as me!
I am similar in that I worked with AVR for 5 years and had a cross over period and a learning curve when I started using the...
Tuesday, 27 November 2018 - 01:43
D21 not booting when FTDI connected My other idea was to try and use fets to isolate the signal, but then I would need to double fet it in order not to reverse the logic. But the passive components are probably a...
Thursday, 1 November 2018 - 22:59
D21 not booting when FTDI connected Another thing I found very strange. I wrote a bootloader app and everything had been working very well in terms of a cellular OTA that operated on its own uart. When my uart cable...
Wednesday, 31 October 2018 - 23:03
SAMD21 GCLK->CLKCTRL.CLKEN not getting set I do the following (Ignore the C21 related stuff):
system_interrupt_enter_critical_section();
#if (SAMC21)
if (serc_offset == 5) {
serc_offset = 6; //skip 24. its not a real...
Tuesday, 30 October 2018 - 00:34
D21 faster or non-blocking IO access One of my other major concerns was the slew rate of my clock, but based on what that last forum post outputs were and your examinations, I would argue its more likely capacitance...
Saturday, 9 December 2017 - 04:22
D21 faster or non-blocking IO access Standard PORTA.TGL runs only at that speed using the conventional 48mhz pll.
USB on the d21 runs at 96mhz from their dfll or the dpll...as you said. Complicated...
I'll...
Thursday, 7 December 2017 - 04:22
D21 faster or non-blocking IO access Sorry I have been away from this project for the last week :(
Goal: Run LCD at full speed with nothing slowing it down.
The problem is that if I issue a clear screen command to...
within the udc_cdc.c file I created a function to achieve this as a temporary work around: bool usb_cdc_data_available(uint16_t size) { uint8_t buf_sel =...
You put an idea into my head, I did a bit more reading now that I knew what I was looking for in the datasheet. Turns out the SAMD21 datasheet recommends looking at the Armv5...
For people in the future I can't get the full circular going yet with multi descriptors, but if you set the "next_descriptor" member of your function to itself, it should work...
Updates: I got a usb cdc echo example working. This leads me to believe there is something wrong with their driver. I started playing around with my samd21 xpro with all...
Someone finally have the same experience as me! I am similar in that I worked with AVR for 5 years and had a cross over period and a learning curve when I started using the...
My other idea was to try and use fets to isolate the signal, but then I would need to double fet it in order not to reverse the logic. But the passive components are probably a...
Another thing I found very strange. I wrote a bootloader app and everything had been working very well in terms of a cellular OTA that operated on its own uart. When my uart cable...
I do the following (Ignore the C21 related stuff): system_interrupt_enter_critical_section(); #if (SAMC21) if (serc_offset == 5) { serc_offset = 6; //skip 24. its not a real...
One of my other major concerns was the slew rate of my clock, but based on what that last forum post outputs were and your examinations, I would argue its more likely capacitance...
Standard PORTA.TGL runs only at that speed using the conventional 48mhz pll. USB on the d21 runs at 96mhz from their dfll or the dpll...as you said. Complicated... I'll...
Sorry I have been away from this project for the last week :( Goal: Run LCD at full speed with nothing slowing it down. The problem is that if I issue a clear screen command to...
Turns out my USB was sharing the same clk generator as the RTC and the source was defined as the 48MHz DFLL. The RTC didn;t like this...
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