xmega256A3B - how to use TOSC pins as IO

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I have done a hardware design where I need to use the TOSC pins = PE6 and PE7 as normal IO pins. I cannot through code or the debugger change the direction or state (High / Low) register bits of PE6 and PE7. I have looked at the startup state of the oscillator registers - their default values gives a state that does not seem to have enabled TOSC (32kHz external oscillator).
So, the question is, how do I switch off the TOSC function of these pins, in other words enable the alternate function of these pins.

Regards
Johan

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OK, I have found the answer to my question. Unlike the 256A3BU, on the 256A3B, the TOSC pins are dedicated and do not have alternate functions. I started on this project quite a while ago, at which time I could only find the 256A3BU manual. Bummer.

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Bummer. The two pins of port R can be used on an A3B for general I/O right? Where did you find a definitive answer in the datasheet?

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Hi there,
It is a combination of clues really.
1) I could find no way in Studio6 to manipulate these pins (pins 42 and 43) which should be the high bits of port E. This includes looking at the startup configurations of clock setting - seeing whats enabled by default.
2) Atmel Doc8116 page 2, does not show these pins as part of port E. It only labels them as TOSC1 and 2.
3) Atmel Doc8116 page 53 - Port E alternate functions, Table30-5, is the final nail in the coffin.
As I said before, when I did the hardware design I was using Doc8362 which is for the 256A3BU, which is what I was planning to use for the design. But the lead time on that was too long, so I sourced a tray of the A3B instead.

Have you practically proven to yourself that the port R pins on the A3B can be used for alternate functions? Because Doc8116 table 30-7 say they cannot.

Regards
Johan

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Hello. I looked at table 30-7 in http://www.atmel.com/Images/doc8... and I do not see where it denies port R for general I/O.

Since I wrote this, i have been using Port-R1 for GPIO and it is working (at least, I am using it as an output successfully.)

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The XMEGA A3B != A3. The latter has the XTAL pins mapped to PR0 and PR1 which appear to offer full GPIO capabilities, however the former has dedicated pins that do not have any associated GPIO functionality.

- Dean :twisted:

Make Atmel Studio better with my free extensions. Open source and feedback welcome!

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Hi Deathcow, can you confirm which CPU you are using? The datasheet does refer to the A3B.

Looking at table 30-7. It does show interrupt as an alternate function for the port R0 and R1 pins, which would infer IO as well. Unfortunately no alternate function is shown for the TOSC pins on port E - which is my problem.

Regards

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I am using "ATXMEGA256A3B-AU"

Dean, your "latter" and "former" are reversed.

Mike in Alaska