Xmega16E5 - Flash page write triggers PORTR XTAL pin output

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Hi,

 

I am using an Xmega16E5 (Rev. B) and the XBoot bootloader. I have been able to make it install new firmware successfully but only after setting PORTR, pin 0 (XTAL2) as an input. When set as an output pin, the problem occurs in the section where a flash page write occurs. This will actually cause the pin to be driven low seemingly at random. In our device this will cause a reset on another chip that is connected to this pin. None of the code in the bootloader seems to use this pin, obviously. I have attached an image where you can see 4 good firmware upgrades and then a hang due to the faulty logic. Can anyone shed some light on this behaviour?

 

Here is our current solution:

ioport_set_pin_dir(IOPORT_CREATE_PIN(PORTR, 0), IOPORT_DIR_INPUT);
ioport_set_pin_level(IOPORT_CREATE_PIN(PORTR, 0), IOPORT_PIN_LEVEL_HIGH);
ioport_set_pin_mode(IOPORT_CREATE_PIN(PORTR, 0), IOPORT_MODE_WIREDAND);

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This topic has a solution.
Last Edited: Wed. Nov 6, 2019 - 09:55 AM
This reply has been marked as the solution. 
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Total votes: 1

Solved in our codebase, the cli() call in a flash page write could trigger a reset pulse under specific cases in a timer ISR.

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czee wrote:
Solved

Thanks for the feedback.

 

Now see Tip #5.

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Last Edited: Tue. Nov 5, 2019 - 06:02 PM