xmega interrupt vectors...

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Im developing a Forth compiler for the my atxmega256a3bu xplained board.  Im adding support for ram based interrupt vectors allowing any interrupt vector to be modified at run time and I have hit a snag.  I can not tell which timer counter type is associated with TCE0 (or TCE1 etc).  I have looked in various PDFs for this device and none of them explain weather or not this interrupt vector is associated with a timer counter or a timer counter type 2.

 

Im probably missing some snippet of information buried in the PDFs that would clear up the issue but i have not been able to find anything to help me here.  The documentation suggests that PORTE actually has interrupt capabilities with both types of timer counter but I dont see two different interrupt vectors for port E.

 

Timer Counters have 6 interrupt vectors associated with them.  OVF_vect, ERR_vect, CCA_vect, CCB_vect, CCC_vect and CCD_vect. 

Type 2 timer counters also have 6 interrupt vectors, LUNF_vect, HUNF_vect, LCMPA_vect, LCMPB_vect, LCMPC_vect and LCMPD_vect. 

Port E has an interrupt vector base at TCE0_INT_base which is an array of 6 interrupt vectors.... but of which type?

 

 

 

If something can be read without effort then great effort has gone into its writing

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TCxy means Timer/Counter of type y on PORTx. So TCE0_INT_base is the interrupt base for a type 0 Timer/Counter which waveform pins are on PORTE.

Ozhan KD
Knowledge is POWER

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TYVM for the reply and the explanation.. any chance you can point me to where it explains that in the documentation?

 

Part of my confusion factor is my not seeing interrupt vectors for timer count2 yet...

 

Atmel-8362-8-and-16bit-AVR-microcontroller-ATxmega256A3Bu_datasheet.pdf  page 36..

 

PORTC, PORTD, PORTE and PORTF each has one Timer/Counter 2.  Notation of these are TCC2 (Time/Counter C2) TCD2, TCE2 and TCF2 respectively.

 

Yet I see  no interrupt vectors for these... these timer counters dont have interrupts associated with them?

If something can be read without effort then great effort has gone into its writing

Last Edited: Wed. Mar 25, 2015 - 07:21 PM
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For atxmega256a3bu see "interrupt description" column of table15-1 on datasheet.

 

Edit: TCC0 and TCC2 interrupt vectors have common addresses:

 

#define TCE0_OVF_vect 0x00BC ///< Overflow Interrupt
#define TCE2_LUNF_vect 0x00BC ///< Low Byte Underflow Interrupt

 

Ozhan KD
Knowledge is POWER

Last Edited: Wed. Mar 25, 2015 - 07:35 PM
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ok, the include files clear it up...

 

/* TCD0 interrupt vectors */
#define TCD0_OVF_vect_num  77
#define TCD0_OVF_vect      _VECTOR(77)  /* Overflow Interrupt */

/* TCD2 interrupt vectors */
#define TCD2_LUNF_vect_num  77
#define TCD2_LUNF_vect      _VECTOR(77)  /* Low Byte Underflow Interrupt */

 

 

the TCx0 and TCx2 interrupt vectors are in the same location.

 

 

lol you must have been writing that edit at the same time i was posting this :)

 

tyvm :)

 

If something can be read without effort then great effort has gone into its writing

Last Edited: Wed. Mar 25, 2015 - 07:47 PM
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hmm. Wouldn't it be hard to actually DO Forth on a harvard machine?

The largest known prime number: 282589933-1

It's easy to stop breaking the 10th commandment! Break the 8th instead. 

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actually no forth is never hard to do except on a PIC :P

 

usually with harvard architectures you use an indirect threaded forth.  I have in the past developed direct threaded forths for 8051's.  The forth I am currently developing for AVR is subroutine threaded.

 

I have forths for X86 linux (32 bit only, direct threading)

Arm Linux (ARM instruction set, sub threading)

Arm Linux (Thumb2, sub threading)

Android (indirect threaded NDK Library)

If something can be read without effort then great effort has gone into its writing