Xmega EEPROM curiousities

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The EEPROM on my Xmega 128a1 rev. H chip on my Xplain board was pre-programmed. I expected it to contain only 0xff but that was not the case.

Most of the EEPROM has alternating blocks containing either 0x00 or 0xff. The blocks are either 32 bytes or 64 bytes.

The beginning of the EEPROM has an ascii string:

$Rev: 2056 $

I think somebody sent me a secret message, but I don't know how to decode it. :)

Apparently the EESAVE fuse bit comes programmed, as this EEPROM has survived many app program loads via JTAG.

The Xmega A datasheet shows the default bits in the various fuses, except for the fuse that contains the EESAVE bit. I guess Atmel doesn't know how that fuse is programmed in the factory.

I had trouble writing to EEPROM. The write would work but the CPU would die. I cured this problem by putting the CPU to sleep immediately after commanding the NVM controller to do an "Erase and write EEPROM page".

The datasheet errata mentions a similar problem for the rev G chip but not for the rev H. For the rev G it gives two alternate fixes, if I understand it correctly. One fix is to use the 2 MHz RC oscillator for a system clock. The other is to sleep after the write or erase command. My chip is rev. H, and I always use the 2 MHz clock but I still need to sleep.

Should this be reported to Atmel?