Xmega documentation ATXMEGAA4 & D4

Go To Last Post
16 posts / 0 new
Author
Message
#1
  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

I've just found out that despite the ATMEGAA4 data sheet stating the availability of the x8 (3bit) extension being available with the AWeX, its not available on the ATXMEGA32A4 that I'm using. Gone over to an ATXMEGA32D4 that is claimed to have this feature but am bit unsure about the absolute address of the system reset vector as its missing from absolute address list in the include file 'ATxmega32D4def.inc'. Start of memory seems to work-can anyone confirm this is safe? Am migrating over from Megas and coding in Assembler. I find the documentation challenging - why don't they get a few people to proof read data sheets to ensure that ambiguities are removed? Why is the interrupt vector table not presented in the data sheets? :?:

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

Quote:

Start of memory seems to work-can anyone confirm this is safe?

True of all AVRs until you start messing with BOOTRST fuses.
Quote:

Why is the interrupt vector table not presented in the data sheets?

What Atmel have done for Xmega (that's new) is to take all the bits of information for a "family" that applies to all devices in that family and put it into a generic family manual. Then for each device (or sub-group of devices) there is a datasheet that has the specific information for that/those model(s).

I don't have your datasheets downloaded but taking an example of the atxmega128a1 there is the generic "A manual" (doc8077) that talks about interrupts but does not give a listing of vector entries. Then there is a specific manual (doc8067) for the 64A1/128A1/192A1/256A1/384A1 which does have a vector table listing in chapter 13.3 (it even mentions the RESET at 0x0000).

So if you were looking at the equivalent of doc8077 rather than doc8067 for your devices you may not find everything you need.

I guess the argument for this split is (a) the info is huge and if the "generic" data was duplicated into every device manual they'd all be even bigger and (b) for document maintenance purposes it's better to group the generic stuff in one place than having to change it in 5 or 10 different copies.

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

Thanks for putting me right. What threw me was that the Reset vector address was not defined in the definition file for the 4D but is in for the 4A.

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

Quote:

not defined in the definition file for the 4D but is in for the 4A.

I looked at both - couldn't see it in either. What's it called in the 4A file?

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

chapter 14.3 in doc. 8069Q–AVR–12/10 - ATXMEGAA4
Just got hold of the ATXMEGA32D4 chip. Despite the data sheet claiming x8 capability for the Hi Res extension to the AWeX, when I set bit HRPLUS in register HIRESC_CTRLA (to kick up to x8 from x4 which runs), the processor sulks. Is this an example of Atmel wishful thinking? I really need x8 so am not sure how to proceed. Any suggestions?
Thanks
John

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

Just to be sure by asking a stupid question, Clkper runs 4 times slower than Clkper4 in your system, right ? This is mandatory for the HiRes to work. I can't really help you on these chip (A4, D4). I have successfully used the HiRes (x8) with the Awex on a A1U chip.

Have a nice day,
Kraal

Have a nice day,
Kraal

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

Kraal, yes clocks are right. I can get the x4 to run just fine, but when I enable the supercharger bit 'HRPLUS', the chip sulks. Did you get x 8 on the A1 chip or just x4?
John

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

John, the auto-smiley thingy ate my post. I have successfully used the x 8 resolution (ClkPer4 at 8MHz, ClkPer at 2MHz) on a ATXmega128A1U. So maybe there was a bug that has been resolved in the last silicon revision...

Have a nice day,
Kraal

Have a nice day,
Kraal

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

I just looked, and I didn't see anything about 8x in the A4 datasheet. Could you point out where it's located (page #)? The D4 does claim to have 8x, but I've never worked with that chip.

I know the 8x works great on the XMega32A4U.

Jeff Nichols

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

My point was that although the ATMEGA A generic data sheet does claim x8, the ATMEGA32A4 specifically only claims x4. Can you share with me how you got it to do x8. My gripe was that on discovering the ATMEGA32A4 would not do x8, I got an ATMEGA32D4 that claims to do so in the documentation, only to find that it will not. A code snippet of how you got the 32A4 to do the job would be much appreciated.
John

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

Where does it claim x8? Are you confusing the AU manual and the A manual?

The 32A4U and the 32A4 are in different chip families. I only ever used x4 on a 32A4 (before the 32A4U was released).

As for how, I set the hires CTRLA to 0x05 instead of 0x01. Not much to it.

Jeff Nichols

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

No I'm reading the AU manual and using AU chip. Setting bit 2 as the manual suggests and you describe just does not work. I've put a request in to technical support but do not hold my breath. Just found another nasty error in the section dealing with the event system description in the 'D' manual. Its been said elsewhere - the quality of the manuals is poor - there are too many errors to inspire confidence.

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

What is the full part number of the chip you're using? The ATxmega32A4-AU is not an A4U and one shouldn't refer to the AU manual for its operation.

Sorry to harp on about this, but Atmel's part numbering scheme leaves a lot to be desired, and unless you've just switched to an A4U, this is probably the source of your problem.

Jeff Nichols

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

Thanks for the clarification on the 32A4U v 32A4-AU.
I twigged this and therefore read up on the ATXEGA D series (not qualified as DU) in document 8210C–AVR–09/11.
This confirms what is claimed for the ATXMEGA32D4-AU (doc. 8135L–AVR–06/12) para 18.1, that the x8 high res extension is available for the D version of the chip.
My problem is that I cannot get more than x4 out of this chip - have you been more successful, or is this a 'phantom' feature?

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

I think this may be a copy-paste mistake - the old XMEGA D manuals have the AWEX module marked as x4 resolution rather than x8.

- Dean :twisted:

Make Atmel Studio better with my free extensions. Open source and feedback welcome!

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

Dean, I suspect you are right.
The D manual also has other bad errors - I suspect again done as a sloppy copy and paste. What I find so unsettling and disappointing is that a product based on a very, very good original idea and implementation could be so let down by down by sloppy proof reading of the supporting manuals.
The 'A' series manual reads very well, but the 'D' manual has been given short shrift. For example para 5.8.1, table 5.3 refers to table 5.4 which is just wrong.
I cannot understand why the senior management do not take these matters seriously - or is it that the users of a few thousand parts a year just do not matter in their plans - shame - after my early positive experience with the Atiny and Mega chips (but not the badly documented ATMEGA16M1) I was rash enough to purchase some stock as part of my pension fund - lost about $14,000 so far! - I just wonder if the stock value reflects the Atmel's attitude towards correct documentation?