xmega DMA for high speed serial IO

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I have a project that needs 115kbaud of serial IO. I need to implement FIFO (ring) buffers for reception but at that speed the CPU gets interrupted at about 11kHz, so I'm wondering whether the DMA can be used for this? It looks from the docs that the DMA destination address can be reloaded automatically at end of block, so I'm guessing this can be done for incoming data using the current destination address as the FIFO write pointer. The foreground code could read out the data and increment a read pointer.

I'm unsure how this might work for writes, but since I send packets of data I could arrange a DMA just to send the entire packet in one go so I don't think that will be a problem.

Has anyone used the DMA for high speed serial IO using ring buffers, and is there any example code out there?

Thanks!

Mark.

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Your problem is not so clear.DMA can read received byte from USART and write it to a buffer in SRAM. It can also do a write from a buffer in SRAM to USART for transmitting data.

Ozhan KD
Knowledge is POWER

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electronic.designer wrote:
Your problem is not so clear.DMA can read received byte from USART and write it to a buffer in SRAM. It can also do a write from a buffer in SRAM to USART for transmitting data.

What information are you missing? When using FIFO ring buffers for interrupt driven IO the receive ISR would normally write the received byte to the FIFO and increment a write pointer. It seems the DMA, if it can be programmed to automatically reload the destination address and run continously, does exactly that, and the current destination address would in effect be the write pointer. I was just wondering if anyone had done this.

Mark.

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mapelec wrote:
It seems the DMA, if it can be programmed to automatically reload the destination address and run continously, does exactly that

Automatic reload of destination address can be done after each burst, block or transaction (See DMA_CHx_ADDRCTRL). You can set DESTADDR registers to the first location of receive buffer with BURST=1,BLOCK=size of buffer, REPEAT=0 for unlimited repeat and a destination reload after each block transfer.

Ozhan KD
Knowledge is POWER

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electronic.designer wrote:
Automatic reload of destination address can be done after each burst, block or transaction (See DMA_CHx_ADDRCTRL). You can set DESTADDR registers to the first location of receive buffer with BURST=1,BLOCK=size of buffer, REPEAT=0 for unlimited repeat and a destination reload after each block transfer.

Thanks, I thought it should be able to do this, which makes it very useful for high speed serial IO.

Mark.