XMEGA ATxmega64A1 COMPs, DACs,

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Looking at trying to use these XMEGA parts. I need 2 Comparators and 2 DACs to provide references for them. This part is suppose to have 4 COMPs and 2 DACs.

According to the Manual, there is a selection in the COMP regs to connect the DAC to one of the inputs. My question is which DAC????

If there are 2 DACs in this part, then each comp should have bit selectors to pick which DAC to use with each comparator. I don't see that. Just one DAC selection. Does not make sense!

Do the COMP, ADC, DAC, etc work on these parts or do they have bugs? Anyone having experience with these XMEGA parts would be greatly appreciated.

Chris.

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As far as I read there is two DAC on ATxmega64A1 with names of DACA and DACB (from Atmel ATxmega256A3,ATxmega192A3,ATxmega128A3,ATxmega64A3 Preliminary PDF).
And there is some registers for each of them CTRLA,CTRLB,CTRLC and etc.(from Atmel XMEGA A MANUAL Preliminary PDF).
AND you can select output from each DAC to be your comparator input with maipulating Bit 4 of CTRLA( IDOEN: DAC Internal Output Enable)register of each DACs.
And as it is described in atmel AVR1000 Getting Started Writing C-code for XMEGA PDF you would be able to call each register of each peripheral like this:

Quote:
Example: To access the CTRLA register of Timer/Counter C0, use the name TCC0_CTRLA.

So if you want to manipulate CTRLA of DACA you should use DACA_CTRLA to refer to it.
I think the same hierarchical method is used for comparator.
Further more I found direct adress of some usefull registers for you in io library for ATxmega64a1 in AVR_GCC:

It is :

/* DACA - Digitalto Analog Converter A */
#define DACA_CTRLA  _SFR_MEM8(0x0300)
#define DACA_CTRLB  _SFR_MEM8(0x0301)
#define DACA_CTRLC  _SFR_MEM8(0x0302)
#define DACA_EVCTRL  _SFR_MEM8(0x0303)
#define DACA_TIMCTRL  _SFR_MEM8(0x0304)
#define DACA_STATUS  _SFR_MEM8(0x0305)
#define DACA_GAINCAL  _SFR_MEM8(0x0308)
#define DACA_OFFSETCAL  _SFR_MEM8(0x0309)
#define DACA_CH0DATA  _SFR_MEM16(0x0318)
#define DACA_CH1DATA  _SFR_MEM16(0x031A)

/* DACB - Digital to Analog Converter B */
#define DACB_CTRLA  _SFR_MEM8(0x0320)
#define DACB_CTRLB  _SFR_MEM8(0x0321)
#define DACB_CTRLC  _SFR_MEM8(0x0322)
#define DACB_EVCTRL  _SFR_MEM8(0x0323)
#define DACB_TIMCTRL  _SFR_MEM8(0x0324)
#define DACB_STATUS  _SFR_MEM8(0x0325)
#define DACB_GAINCAL  _SFR_MEM8(0x0328)
#define DACB_OFFSETCAL  _SFR_MEM8(0x0329)
#define DACB_CH0DATA  _SFR_MEM16(0x0338)
#define DACB_CH1DATA  _SFR_MEM16(0x033A)

/* ACA - Analog Comparator A */
#define ACA_AC0CTRL  _SFR_MEM8(0x0380)
#define ACA_AC1CTRL  _SFR_MEM8(0x0381)
#define ACA_AC0MUXCTRL  _SFR_MEM8(0x0382)
#define ACA_AC1MUXCTRL  _SFR_MEM8(0x0383)
#define ACA_CTRLA  _SFR_MEM8(0x0384)
#define ACA_CTRLB  _SFR_MEM8(0x0385)
#define ACA_WINCTRL  _SFR_MEM8(0x0386)
#define ACA_STATUS  _SFR_MEM8(0x0387)

/* ACB - Analog Comparator B */
#define ACB_AC0CTRL  _SFR_MEM8(0x0390)
#define ACB_AC1CTRL  _SFR_MEM8(0x0391)
#define ACB_AC0MUXCTRL  _SFR_MEM8(0x0392)
#define ACB_AC1MUXCTRL  _SFR_MEM8(0x0393)
#define ACB_CTRLA  _SFR_MEM8(0x0394)
#define ACB_CTRLB  _SFR_MEM8(0x0395)
#define ACB_WINCTRL  _SFR_MEM8(0x0396)
#define ACB_STATUS  _SFR_MEM8(0x0397)

I hope that was helpfull.
By the way how lucky you are to start working with those tempting XMEGAs!I am still in dream of working with them!

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Thanks for the reply. More details:

Look at DOC8077 on page 332-333, there is register ACnMUXCTRL, and bits MUXNEG and MUXPOS. There are 7 possible selections that pick which pins to connect to the COMP. Setting 111 (7) says "DAC". Ok, which DAC?

I do not see any ability to choose which of the two DACs is being selected. That's my question.

>> By the way how lucky you are to start
>> working with those tempting XMEGAs!
>> I am still in dream of working with them!

Well I'm coming from a nightmare. I just finished the design with the dsPIC33FJ16GS502. And after I tested it, there are major bugs in the Silicon. It's garbage. Will not work. The COMP have major bugs in the silicon, many ADC, DAC, and PWM bugs too. So I have to drop that design and choose another MCU.

This XMEGA family has what I need, I think, but I am very gun shy right now. Really want to know if the perfs actually work or have bugs too. I saw several reports about XMEGA bugs. Now I find that the manual data here on the COMP does not seem to make sense.

I guess what I can do is assign the DACs to actual pins, and then I can choose what pins feed the COMPs.

Either I go with this part, praying that the internal perfs actually work, or I go with a ADuC7021 and use external comps. I know everything works on the ADuC702, but I have to use external comps.

If anyone has used these ADCs, DACs, and COMPs, in the XMEGA I'd really like to know if they worked as advertised.

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cstrahm wrote:
Setting 111 (7) says "DAC". Ok, which DAC?
I would be quite surprised, due to the modularity seen nearly everywhere, that it would be any DAC other than the one associated with the same analog port as the analog comparator you're using. By that I mean DACA is probably associated with ACA and DACB with ACB. It is easy enough to test this hypothesis.

Note, too, that in the discussion of the DAC (sec 26.4) it indicates that it is the output of the DAC proper (rather than the sample/hold circuitry) that is fed to the AC. This means that you are limited to single channel operation on the DAC providing an input the the analog comparator.

Don Kinzer
ZBasic Microcontrollers
http://www.zbasic.net

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cstrahm wrote:
If anyone has used these ADCs, DACs, and COMPs, in the XMEGA I'd really like to know if they worked as advertised.
I have used all three (but not in all modes, necessarily) and, so far, everything has worked as advertised. I haven't used DAC output as an analog comparator input, though.

Don Kinzer
ZBasic Microcontrollers
http://www.zbasic.net

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Quote:

By that I mean DACA is probably associated with ACA and DACB with ACB. It is easy enough to test this hypothesis.

I agree with dkinzer.This can be confirmed not only by test but also by looking at XMEGA A Block Diagram in page 4 of Atmel XMEGA A MANUAL Preliminary PDF.
As you can see in that picture DAC's output as an internal input only goes to the same port ADC or AC.

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Yes I see in the block dia that the two halfs are setup together, DACa/COMPa and DACb/COMPb. However interesting is that there are actually 4 COMPs in this part, only two appear in the dia. But all I need is 2 comps fed by 2 dacs and it looks like this part should do the trick.

I need a common voltage range for the COMPs, DACs, ADCs. From what I can tell, the ADC seems to be the limiting factor. It only goes up to AVDD-0.6, while the others appear to go to AVDD. It has several options for int ref. Lot of complex scaling. If I can setup a 2.5V ref for everything that would be ideal.

Interesting parts. The Event system I may be able to use as well. I have much high speed ISR overhead. Also, the AWEX system may be able to do some of my complex PWM tricks.

These parts look very interesting. I'll do up a design. I just hope all the internal stuff works. If it doesn't, I'm sure to hit the bugs.

Thank you all.