I was going through Elm Chan's FatFs MMC schematic because I need to implement an SPI bus on my board. I noticed that SS, MOSI and MISO all have a pull up resistor on them.
Full Size Link: http://i.imgur.com/bNaP4.png
I understand why its there on SS, but why MOSI and MISO? I know that they aren't strictly required because on a recent project I simply have 4 traces going to the SPI peripheral.
The SPI bus that I have to implement will have 4 devices:
1) CPLD configured as a Serial In Parallel Out shift register
2) CPLD configured as a Parallel In Serial Out shift register
3) Another CPLD...
4) SD Card
Now, I planned on having 10K pull ups on each SS line anyway, but should I include the MOSI and MISO ones as well? Is it good practice and if so, why do I stand to gain from them?[/img]