why does this program only run sometimes?

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The title program is test code originally put on a atmaga32u4 by a TWI bootloader.

I also have JTAG access.

The code just pats its external watchdog and uses Arduino to write to its USB port.

After being bootloaded, the code did not run.

Avrdude and JTAG tell me the code got there.

Sometimes the code runs and I can read from the port

and see the port in the Windows 10 device manager.

 

As a test, I set the high fuse to 0x91: boot to app.

I have not changed it since.

It ran, that time.

Power-cycling reliably stops the code.

Sometimes reading the fuses will start the code.

Sometimes setting the high fuse to 0x91 (Edit: from 0x91) will start the code.

Doing both will *almost* always start the code.

As an experiment, I tried power-cycling without the Atmel-ICE attached.

No go.

 

I'm at a loss for things to look for.

Any ideas?

 

This topic has a solution.

"Demons after money.
Whatever happened to the still beating heart of a virgin?
No one has any standards anymore." -- Giles

Last Edited: Mon. Apr 30, 2018 - 11:01 PM
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Are you able to post the test app code and lss?

"Experience is what enables you to recognise a mistake the second time you make it."

"Good judgement comes from experience.  Experience comes from bad judgement."

"Wisdom is always wont to arrive late, and to be a little approximate on first possession."

"When you hear hoofbeats, think horses, not unicorns."

"Fast.  Cheap.  Good.  Pick two."

"We see a lot of arses on handlebars around here." - [J Ekdahl]

 

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Cannot get at it right now.

From memory:

#include "Arduino.h"
#include <stdint.h>
#include <stdbool.h>

void setup();

void loop()
{
    while(1) {
        Serial.println("Goodbye, cruel world.");
        delay(3000);
    }
}

I realized just now that the wile was unnecessary.

Not used to Arduino.

I think there were a lot of comments that I did not delete,

 

BTW I can barely see, much less read the code.

The colors are awful.

"Demons after money.
Whatever happened to the still beating heart of a virgin?
No one has any standards anymore." -- Giles

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For USB AVR like the 32u4 (Leonardo), main() looks like this:

#include <Arduino.h>

int main(void)
{
	init();

#if defined(USBCON)
	USB.attach();
#endif
	
	setup();
    
	for (;;) {
		loop();
		if (serialEventRun) serialEventRun();
	}
        
	return 0;
}

So if USB.attach() is failing or hanging, you'll never get to setup() or loop().

 

Maybe try just a simple blinky with your own main(), see if it still behaves the same.

"Experience is what enables you to recognise a mistake the second time you make it."

"Good judgement comes from experience.  Experience comes from bad judgement."

"Wisdom is always wont to arrive late, and to be a little approximate on first possession."

"When you hear hoofbeats, think horses, not unicorns."

"Fast.  Cheap.  Good.  Pick two."

"We see a lot of arses on handlebars around here." - [J Ekdahl]

 

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The only blinkables I can get to are attached through TWI.

I'll see what I can do, but it might be tomorrow.

"Demons after money.
Whatever happened to the still beating heart of a virgin?
No one has any standards anymore." -- Giles

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Having struggled with the documentation on the blinkables,

I'm not confident enough to use them for testing.

 

The TWI bootloader is driven by a bootloader on an atmega2560.

Code for the atmega32U4 and the atmega2560 go through the atmega2560 bootloader.

The test code on the atmega2560 samples TWI's SCL (pin D,0) every second.

The test code on the atmega32U4 toggles TWI's SCL (also D, 0) every five seconds.

The 2560 output suggests that the32U4 does not toggle.

Sometimes power-cycling changes the value read, but it sticks with that value.

I suspect a hardware problem, but I don't know what it might be.

The TWI bootloader seems to work and that requires the SCLs to be connected as advertised.

The LED code definitely works.  What else is there?

 

32U4 code:

#include <avr/io.h>
#include <util/delay.h>
#include <stdint.h>
#include <stdbool.h>
#include <stdio.h>
#include "portbits.h"

#define SCL D,0
#define DOG B,0

int main(void)
{
  for(bool bit=0; ; bit=!bit) {
    dset(DOG);
    ptog(DOG);
    if(0) {
    if(bit) { pclr(SCL); dset(SCL); }  // now driven 0
    else    { pset(SCL); dclr(SCL); }  // now pulled 1
    } else {
        dset(SCL); ptog(SCL);  // Danger! Will Robinson!
    }
    _delay_ms(5000);
  }
}

2560 code:

#include <avr/io.h>
#include <stdio.h>
#include "thyme.h"
#include "uart.h"
#include "patdog.h"
#include "pinchoices.h"
#include "portbits.h"

#define SCL D,0

int main(void)
{
    setUpTiming();
    setUpUart();

    dset(orange1);
    dset(blue1);
    dclr(SCL);

    sendCString("Reset!\n");
    char buf[100]="";
    unsigned zeros=0, ones=0;

    for(unsigned b=0; ; ++b) {
        patDog();
        if(0==buf[b]) b=0;
        if(0==b) {
            snprintf(buf, sizeof(buf), "0: %u  1:%u  blinky   %s\n",
                     zeros, ones, __TIME__ );
        }
        sendByte(buf[b]);
        if(pval(SCL)) { pclr(blue1); pset(orange1); ++ones; }   // make orange
        else          { pset(blue1); pclr(orange1); ++zeros; }  // make blue
        delay(SECOND1);
    }  // b
}  // main

2560 lss:


blinky1-atmega2560.elf:     file format elf32-avr

Sections:
Idx Name          Size      VMA       LMA       File off  Algn
  0 .data         0000002c  00800200  000008ca  0000095e  2**0
                  CONTENTS, ALLOC, LOAD, DATA
  1 .text         000008ca  00000000  00000000  00000094  2**1
                  CONTENTS, ALLOC, LOAD, READONLY, CODE
  2 .bss          00000004  0080022c  0080022c  0000098a  2**0
                  ALLOC
  3 .comment      0000005c  00000000  00000000  0000098a  2**0
                  CONTENTS, READONLY
  4 .note.gnu.avr.deviceinfo 00000040  00000000  00000000  000009e8  2**2
                  CONTENTS, READONLY
  5 .debug_aranges 000000b8  00000000  00000000  00000a28  2**0
                  CONTENTS, READONLY, DEBUGGING
  6 .debug_info   0000115f  00000000  00000000  00000ae0  2**0
                  CONTENTS, READONLY, DEBUGGING
  7 .debug_abbrev 00000e95  00000000  00000000  00001c3f  2**0
                  CONTENTS, READONLY, DEBUGGING
  8 .debug_line   000005e8  00000000  00000000  00002ad4  2**0
                  CONTENTS, READONLY, DEBUGGING
  9 .debug_frame  00000154  00000000  00000000  000030bc  2**2
                  CONTENTS, READONLY, DEBUGGING
 10 .debug_str    0000063b  00000000  00000000  00003210  2**0
                  CONTENTS, READONLY, DEBUGGING
 11 .debug_loc    0000036c  00000000  00000000  0000384b  2**0
                  CONTENTS, READONLY, DEBUGGING
 12 .debug_ranges 00000090  00000000  00000000  00003bb7  2**0
                  CONTENTS, READONLY, DEBUGGING

Disassembly of section .text:

00000000 <__vectors>:
   0:	71 c0       	rjmp	.+226    	; 0xe4 <__ctors_end>
   2:	00 00       	nop
   4:	8e c0       	rjmp	.+284    	; 0x122 <__bad_interrupt>
   6:	00 00       	nop
   8:	8c c0       	rjmp	.+280    	; 0x122 <__bad_interrupt>
   a:	00 00       	nop
   c:	8a c0       	rjmp	.+276    	; 0x122 <__bad_interrupt>
   e:	00 00       	nop
  10:	88 c0       	rjmp	.+272    	; 0x122 <__bad_interrupt>
  12:	00 00       	nop
  14:	86 c0       	rjmp	.+268    	; 0x122 <__bad_interrupt>
  16:	00 00       	nop
  18:	84 c0       	rjmp	.+264    	; 0x122 <__bad_interrupt>
  1a:	00 00       	nop
  1c:	82 c0       	rjmp	.+260    	; 0x122 <__bad_interrupt>
  1e:	00 00       	nop
  20:	80 c0       	rjmp	.+256    	; 0x122 <__bad_interrupt>
  22:	00 00       	nop
  24:	7e c0       	rjmp	.+252    	; 0x122 <__bad_interrupt>
  26:	00 00       	nop
  28:	7c c0       	rjmp	.+248    	; 0x122 <__bad_interrupt>
  2a:	00 00       	nop
  2c:	7a c0       	rjmp	.+244    	; 0x122 <__bad_interrupt>
  2e:	00 00       	nop
  30:	78 c0       	rjmp	.+240    	; 0x122 <__bad_interrupt>
  32:	00 00       	nop
  34:	76 c0       	rjmp	.+236    	; 0x122 <__bad_interrupt>
  36:	00 00       	nop
  38:	74 c0       	rjmp	.+232    	; 0x122 <__bad_interrupt>
  3a:	00 00       	nop
  3c:	72 c0       	rjmp	.+228    	; 0x122 <__bad_interrupt>
  3e:	00 00       	nop
  40:	70 c0       	rjmp	.+224    	; 0x122 <__bad_interrupt>
  42:	00 00       	nop
  44:	6e c0       	rjmp	.+220    	; 0x122 <__bad_interrupt>
  46:	00 00       	nop
  48:	6c c0       	rjmp	.+216    	; 0x122 <__bad_interrupt>
  4a:	00 00       	nop
  4c:	6a c0       	rjmp	.+212    	; 0x122 <__bad_interrupt>
  4e:	00 00       	nop
  50:	68 c0       	rjmp	.+208    	; 0x122 <__bad_interrupt>
  52:	00 00       	nop
  54:	66 c0       	rjmp	.+204    	; 0x122 <__bad_interrupt>
  56:	00 00       	nop
  58:	64 c0       	rjmp	.+200    	; 0x122 <__bad_interrupt>
  5a:	00 00       	nop
  5c:	62 c0       	rjmp	.+196    	; 0x122 <__bad_interrupt>
  5e:	00 00       	nop
  60:	60 c0       	rjmp	.+192    	; 0x122 <__bad_interrupt>
  62:	00 00       	nop
  64:	5e c0       	rjmp	.+188    	; 0x122 <__bad_interrupt>
  66:	00 00       	nop
  68:	5c c0       	rjmp	.+184    	; 0x122 <__bad_interrupt>
  6a:	00 00       	nop
  6c:	5a c0       	rjmp	.+180    	; 0x122 <__bad_interrupt>
  6e:	00 00       	nop
  70:	58 c0       	rjmp	.+176    	; 0x122 <__bad_interrupt>
  72:	00 00       	nop
  74:	56 c0       	rjmp	.+172    	; 0x122 <__bad_interrupt>
  76:	00 00       	nop
  78:	54 c0       	rjmp	.+168    	; 0x122 <__bad_interrupt>
  7a:	00 00       	nop
  7c:	52 c0       	rjmp	.+164    	; 0x122 <__bad_interrupt>
  7e:	00 00       	nop
  80:	50 c0       	rjmp	.+160    	; 0x122 <__bad_interrupt>
  82:	00 00       	nop
  84:	4e c0       	rjmp	.+156    	; 0x122 <__bad_interrupt>
  86:	00 00       	nop
  88:	4c c0       	rjmp	.+152    	; 0x122 <__bad_interrupt>
  8a:	00 00       	nop
  8c:	4a c0       	rjmp	.+148    	; 0x122 <__bad_interrupt>
  8e:	00 00       	nop
  90:	48 c0       	rjmp	.+144    	; 0x122 <__bad_interrupt>
  92:	00 00       	nop
  94:	46 c0       	rjmp	.+140    	; 0x122 <__bad_interrupt>
  96:	00 00       	nop
  98:	44 c0       	rjmp	.+136    	; 0x122 <__bad_interrupt>
  9a:	00 00       	nop
  9c:	42 c0       	rjmp	.+132    	; 0x122 <__bad_interrupt>
  9e:	00 00       	nop
  a0:	40 c0       	rjmp	.+128    	; 0x122 <__bad_interrupt>
  a2:	00 00       	nop
  a4:	3e c0       	rjmp	.+124    	; 0x122 <__bad_interrupt>
  a6:	00 00       	nop
  a8:	3c c0       	rjmp	.+120    	; 0x122 <__bad_interrupt>
  aa:	00 00       	nop
  ac:	3a c0       	rjmp	.+116    	; 0x122 <__bad_interrupt>
  ae:	00 00       	nop
  b0:	38 c0       	rjmp	.+112    	; 0x122 <__bad_interrupt>
  b2:	00 00       	nop
  b4:	36 c0       	rjmp	.+108    	; 0x122 <__bad_interrupt>
  b6:	00 00       	nop
  b8:	34 c0       	rjmp	.+104    	; 0x122 <__bad_interrupt>
  ba:	00 00       	nop
  bc:	32 c0       	rjmp	.+100    	; 0x122 <__bad_interrupt>
  be:	00 00       	nop
  c0:	30 c0       	rjmp	.+96     	; 0x122 <__bad_interrupt>
  c2:	00 00       	nop
  c4:	2e c0       	rjmp	.+92     	; 0x122 <__bad_interrupt>
  c6:	00 00       	nop
  c8:	2c c0       	rjmp	.+88     	; 0x122 <__bad_interrupt>
  ca:	00 00       	nop
  cc:	2a c0       	rjmp	.+84     	; 0x122 <__bad_interrupt>
  ce:	00 00       	nop
  d0:	28 c0       	rjmp	.+80     	; 0x122 <__bad_interrupt>
  d2:	00 00       	nop
  d4:	26 c0       	rjmp	.+76     	; 0x122 <__bad_interrupt>
  d6:	00 00       	nop
  d8:	24 c0       	rjmp	.+72     	; 0x122 <__bad_interrupt>
  da:	00 00       	nop
  dc:	22 c0       	rjmp	.+68     	; 0x122 <__bad_interrupt>
  de:	00 00       	nop
  e0:	20 c0       	rjmp	.+64     	; 0x122 <__bad_interrupt>
	...

000000e4 <__ctors_end>:
  e4:	11 24       	eor	r1, r1
  e6:	1f be       	out	0x3f, r1	; 63
  e8:	cf ef       	ldi	r28, 0xFF	; 255
  ea:	d1 e2       	ldi	r29, 0x21	; 33
  ec:	de bf       	out	0x3e, r29	; 62
  ee:	cd bf       	out	0x3d, r28	; 61
  f0:	00 e0       	ldi	r16, 0x00	; 0
  f2:	0c bf       	out	0x3c, r16	; 60

000000f4 <__do_copy_data>:
  f4:	12 e0       	ldi	r17, 0x02	; 2
  f6:	a0 e0       	ldi	r26, 0x00	; 0
  f8:	b2 e0       	ldi	r27, 0x02	; 2
  fa:	ea ec       	ldi	r30, 0xCA	; 202
  fc:	f8 e0       	ldi	r31, 0x08	; 8
  fe:	00 e0       	ldi	r16, 0x00	; 0
 100:	0b bf       	out	0x3b, r16	; 59
 102:	02 c0       	rjmp	.+4      	; 0x108 <__do_copy_data+0x14>
 104:	07 90       	elpm	r0, Z+
 106:	0d 92       	st	X+, r0
 108:	ac 32       	cpi	r26, 0x2C	; 44
 10a:	b1 07       	cpc	r27, r17
 10c:	d9 f7       	brne	.-10     	; 0x104 <__do_copy_data+0x10>

0000010e <__do_clear_bss>:
 10e:	22 e0       	ldi	r18, 0x02	; 2
 110:	ac e2       	ldi	r26, 0x2C	; 44
 112:	b2 e0       	ldi	r27, 0x02	; 2
 114:	01 c0       	rjmp	.+2      	; 0x118 <.do_clear_bss_start>

00000116 <.do_clear_bss_loop>:
 116:	1d 92       	st	X+, r1

00000118 <.do_clear_bss_start>:
 118:	a0 33       	cpi	r26, 0x30	; 48
 11a:	b2 07       	cpc	r27, r18
 11c:	e1 f7       	brne	.-8      	; 0x116 <.do_clear_bss_loop>
 11e:	02 d0       	rcall	.+4      	; 0x124 <main>
 120:	d2 c3       	rjmp	.+1956   	; 0x8c6 <_exit>

00000122 <__bad_interrupt>:
 122:	6e cf       	rjmp	.-292    	; 0x0 <__vectors>

00000124 <main>:
#include "portbits.h"

#define SCL D,0

int main(void)
{
 124:	cf 93       	push	r28
 126:	df 93       	push	r29
 128:	cd b7       	in	r28, 0x3d	; 61
 12a:	de b7       	in	r29, 0x3e	; 62
 12c:	c4 56       	subi	r28, 0x64	; 100
 12e:	d1 09       	sbc	r29, r1
 130:	0f b6       	in	r0, 0x3f	; 63
 132:	f8 94       	cli
 134:	de bf       	out	0x3e, r29	; 62
 136:	0f be       	out	0x3f, r0	; 63
 138:	cd bf       	out	0x3d, r28	; 61
    setUpTiming();
 13a:	97 d0       	rcall	.+302    	; 0x26a <setUpTiming>
    setUpUart();
 13c:	9c d0       	rcall	.+312    	; 0x276 <setUpUart>
 13e:	80 91 0a 01 	lds	r24, 0x010A	; 0x80010a <__TEXT_REGION_LENGTH__+0x70010a>

    dset(orange1);
 142:	80 62       	ori	r24, 0x20	; 32
 144:	80 93 0a 01 	sts	0x010A, r24	; 0x80010a <__TEXT_REGION_LENGTH__+0x70010a>
 148:	80 91 0a 01 	lds	r24, 0x010A	; 0x80010a <__TEXT_REGION_LENGTH__+0x70010a>
    dset(blue1);
 14c:	80 61       	ori	r24, 0x10	; 16
 14e:	80 93 0a 01 	sts	0x010A, r24	; 0x80010a <__TEXT_REGION_LENGTH__+0x70010a>
 152:	50 98       	cbi	0x0a, 0	; 10
    dclr(SCL);
 154:	80 e0       	ldi	r24, 0x00	; 0

    sendCString("Reset!\n");
 156:	92 e0       	ldi	r25, 0x02	; 2
 158:	a9 d0       	rcall	.+338    	; 0x2ac <sendCString>
 15a:	1a 82       	std	Y+2, r1	; 0x02
    char buf[100]="";
 15c:	19 82       	std	Y+1, r1	; 0x01
 15e:	fe 01       	movw	r30, r28
 160:	33 96       	adiw	r30, 0x03	; 3
 162:	82 e6       	ldi	r24, 0x62	; 98
 164:	df 01       	movw	r26, r30
 166:	1d 92       	st	X+, r1
 168:	8a 95       	dec	r24
 16a:	e9 f7       	brne	.-6      	; 0x166 <main+0x42>
 16c:	00 e0       	ldi	r16, 0x00	; 0
    unsigned zeros=0, ones=0;

    for(unsigned b=0; ; ++b) {
 16e:	10 e0       	ldi	r17, 0x00	; 0
 170:	c1 2c       	mov	r12, r1
    dset(blue1);
    dclr(SCL);

    sendCString("Reset!\n");
    char buf[100]="";
    unsigned zeros=0, ones=0;
 172:	d1 2c       	mov	r13, r1
 174:	e1 2c       	mov	r14, r1
 176:	f1 2c       	mov	r15, r1
 178:	ce 01       	movw	r24, r28

    for(unsigned b=0; ; ++b) {
        patDog();
        if(0==buf[b]) b=0;
 17a:	01 96       	adiw	r24, 0x01	; 1
 17c:	5c 01       	movw	r10, r24
 17e:	88 e0       	ldi	r24, 0x08	; 8
        if(0==b) {
            snprintf(buf, sizeof(buf), "0: %u  1:%u  blinky   %s\n",
 180:	68 2e       	mov	r6, r24
 182:	82 e0       	ldi	r24, 0x02	; 2
 184:	78 2e       	mov	r7, r24
 186:	91 e1       	ldi	r25, 0x11	; 17
 188:	89 2e       	mov	r8, r25
 18a:	92 e0       	ldi	r25, 0x02	; 2
 18c:	99 2e       	mov	r9, r25
 18e:	24 e6       	ldi	r18, 0x64	; 100
 190:	52 2e       	mov	r5, r18
    sendCString("Reset!\n");
    char buf[100]="";
    unsigned zeros=0, ones=0;

    for(unsigned b=0; ; ++b) {
        patDog();
 192:	97 d0       	rcall	.+302    	; 0x2c2 <patDog>
 194:	f5 01       	movw	r30, r10
        if(0==buf[b]) b=0;
 196:	e0 0f       	add	r30, r16
 198:	f1 1f       	adc	r31, r17
 19a:	80 81       	ld	r24, Z
 19c:	88 23       	and	r24, r24
 19e:	19 f0       	breq	.+6      	; 0x1a6 <main+0x82>
 1a0:	01 15       	cp	r16, r1
        if(0==b) {
 1a2:	11 05       	cpc	r17, r1
 1a4:	a1 f4       	brne	.+40     	; 0x1ce <main+0xaa>
 1a6:	7f 92       	push	r7
            snprintf(buf, sizeof(buf), "0: %u  1:%u  blinky   %s\n",
 1a8:	6f 92       	push	r6
 1aa:	df 92       	push	r13
 1ac:	cf 92       	push	r12
 1ae:	ff 92       	push	r15
 1b0:	ef 92       	push	r14
 1b2:	9f 92       	push	r9
 1b4:	8f 92       	push	r8
 1b6:	1f 92       	push	r1
 1b8:	5f 92       	push	r5
 1ba:	bf 92       	push	r11
 1bc:	af 92       	push	r10
 1be:	9a d0       	rcall	.+308    	; 0x2f4 <snprintf>
 1c0:	0f b6       	in	r0, 0x3f	; 63
 1c2:	f8 94       	cli
 1c4:	de bf       	out	0x3e, r29	; 62
 1c6:	0f be       	out	0x3f, r0	; 63
 1c8:	cd bf       	out	0x3d, r28	; 61
 1ca:	00 e0       	ldi	r16, 0x00	; 0
 1cc:	10 e0       	ldi	r17, 0x00	; 0
 1ce:	f5 01       	movw	r30, r10
                     zeros, ones, __TIME__ );
        }
        sendByte(buf[b]);
 1d0:	e0 0f       	add	r30, r16
 1d2:	f1 1f       	adc	r31, r17
 1d4:	80 81       	ld	r24, Z
 1d6:	5c d0       	rcall	.+184    	; 0x290 <sendByte>
 1d8:	48 9b       	sbis	0x09, 0	; 9
 1da:	0e c0       	rjmp	.+28     	; 0x1f8 <main+0xd4>
        if(pval(SCL)) { pclr(blue1); pset(orange1); ++ones; }   // make orange
 1dc:	80 91 0b 01 	lds	r24, 0x010B	; 0x80010b <__TEXT_REGION_LENGTH__+0x70010b>
 1e0:	8f 7e       	andi	r24, 0xEF	; 239
 1e2:	80 93 0b 01 	sts	0x010B, r24	; 0x80010b <__TEXT_REGION_LENGTH__+0x70010b>
 1e6:	80 91 0b 01 	lds	r24, 0x010B	; 0x80010b <__TEXT_REGION_LENGTH__+0x70010b>
 1ea:	80 62       	ori	r24, 0x20	; 32
 1ec:	80 93 0b 01 	sts	0x010B, r24	; 0x80010b <__TEXT_REGION_LENGTH__+0x70010b>
 1f0:	bf ef       	ldi	r27, 0xFF	; 255
 1f2:	cb 1a       	sub	r12, r27
 1f4:	db 0a       	sbc	r13, r27
 1f6:	0d c0       	rjmp	.+26     	; 0x212 <main+0xee>
 1f8:	80 91 0b 01 	lds	r24, 0x010B	; 0x80010b <__TEXT_REGION_LENGTH__+0x70010b>
        else          { pset(blue1); pclr(orange1); ++zeros; }  // make blue
 1fc:	80 61       	ori	r24, 0x10	; 16
 1fe:	80 93 0b 01 	sts	0x010B, r24	; 0x80010b <__TEXT_REGION_LENGTH__+0x70010b>
 202:	80 91 0b 01 	lds	r24, 0x010B	; 0x80010b <__TEXT_REGION_LENGTH__+0x70010b>
 206:	8f 7d       	andi	r24, 0xDF	; 223
 208:	80 93 0b 01 	sts	0x010B, r24	; 0x80010b <__TEXT_REGION_LENGTH__+0x70010b>
 20c:	8f ef       	ldi	r24, 0xFF	; 255
 20e:	e8 1a       	sub	r14, r24
 210:	f8 0a       	sbc	r15, r24
 212:	84 ef       	ldi	r24, 0xF4	; 244
        delay(SECOND1);
 214:	90 e0       	ldi	r25, 0x00	; 0
 216:	15 d0       	rcall	.+42     	; 0x242 <delay>
 218:	0f 5f       	subi	r16, 0xFF	; 255
 21a:	1f 4f       	sbci	r17, 0xFF	; 255

    sendCString("Reset!\n");
    char buf[100]="";
    unsigned zeros=0, ones=0;

    for(unsigned b=0; ; ++b) {
 21c:	ba cf       	rjmp	.-140    	; 0x192 <main+0x6e>

0000021e <thyme>:
// returns time in 64 K cycles
thyme_t thyme(void)
{
    static thyme_t thymeOverflows; // initial value does not matter
                                   // only differences matter
    if(TIFR1 & _BV(TOV1)) {
 21e:	b0 9b       	sbis	0x16, 0	; 22
 220:	0b c0       	rjmp	.+22     	; 0x238 <thyme+0x1a>
        ++thymeOverflows;
 222:	80 91 2c 02 	lds	r24, 0x022C	; 0x80022c <__data_end>
 226:	90 91 2d 02 	lds	r25, 0x022D	; 0x80022d <__data_end+0x1>
 22a:	01 96       	adiw	r24, 0x01	; 1
 22c:	90 93 2d 02 	sts	0x022D, r25	; 0x80022d <__data_end+0x1>
 230:	80 93 2c 02 	sts	0x022C, r24	; 0x80022c <__data_end>
        TIFR1=_BV(TOV1);
 234:	81 e0       	ldi	r24, 0x01	; 1
 236:	86 bb       	out	0x16, r24	; 22
    }
    return thymeOverflows;
    return 12;
}  // thyme
 238:	80 91 2c 02 	lds	r24, 0x022C	; 0x80022c <__data_end>
 23c:	90 91 2d 02 	lds	r25, 0x022D	; 0x80022d <__data_end+0x1>
 240:	08 95       	ret

00000242 <delay>:


void delay(thyme_t interval)
{
 242:	0f 93       	push	r16
 244:	1f 93       	push	r17
 246:	cf 93       	push	r28
 248:	df 93       	push	r29
 24a:	ec 01       	movw	r28, r24
    thyme_t start=thyme();
 24c:	e8 df       	rcall	.-48     	; 0x21e <thyme>
 24e:	8c 01       	movw	r16, r24
    while(thyme()-start< interval) patDog();
 250:	e6 df       	rcall	.-52     	; 0x21e <thyme>
 252:	80 1b       	sub	r24, r16
 254:	91 0b       	sbc	r25, r17
 256:	8c 17       	cp	r24, r28
 258:	9d 07       	cpc	r25, r29
 25a:	10 f4       	brcc	.+4      	; 0x260 <delay+0x1e>
 25c:	32 d0       	rcall	.+100    	; 0x2c2 <patDog>
 25e:	f8 cf       	rjmp	.-16     	; 0x250 <delay+0xe>
 260:	df 91       	pop	r29
}  // delay
 262:	cf 91       	pop	r28
 264:	1f 91       	pop	r17
 266:	0f 91       	pop	r16
 268:	08 95       	ret

0000026a <setUpTiming>:
 26a:	10 92 80 00 	sts	0x0080, r1	; 0x800080 <__TEXT_REGION_LENGTH__+0x700080>

void setUpTiming()
{
    // set up timing, normal mode and no scaling
    TCCR1A=0;
    TCCR1B=_BV(CS10);
 26e:	81 e0       	ldi	r24, 0x01	; 1
 270:	80 93 81 00 	sts	0x0081, r24	; 0x800081 <__TEXT_REGION_LENGTH__+0x700081>
    patDog();
 274:	26 c0       	rjmp	.+76     	; 0x2c2 <patDog>

00000276 <setUpUart>:
#include "patdog.h"

void setUpUart(void)
{
    #define BAUD 9600
    UBRR0=F_CPU/(16UL*BAUD)+1;
 276:	89 e6       	ldi	r24, 0x69	; 105
 278:	90 e0       	ldi	r25, 0x00	; 0
 27a:	90 93 c5 00 	sts	0x00C5, r25	; 0x8000c5 <__TEXT_REGION_LENGTH__+0x7000c5>
 27e:	80 93 c4 00 	sts	0x00C4, r24	; 0x8000c4 <__TEXT_REGION_LENGTH__+0x7000c4>
    UCSR0C=3u<<UCSZ00;
 282:	86 e0       	ldi	r24, 0x06	; 6
 284:	80 93 c2 00 	sts	0x00C2, r24	; 0x8000c2 <__TEXT_REGION_LENGTH__+0x7000c2>
    UCSR0B=_BV(RXEN0) | _BV(TXEN0);
 288:	88 e1       	ldi	r24, 0x18	; 24
 28a:	80 93 c1 00 	sts	0x00C1, r24	; 0x8000c1 <__TEXT_REGION_LENGTH__+0x7000c1>
 28e:	08 95       	ret

00000290 <sendByte>:
}  // setUpUart


void sendByte(uint8_t byte)
{
    UDR0=byte;
 290:	80 93 c6 00 	sts	0x00C6, r24	; 0x8000c6 <__TEXT_REGION_LENGTH__+0x7000c6>
    while(!(UCSR0A & _BV(TXC0))) patDog();
 294:	80 91 c0 00 	lds	r24, 0x00C0	; 0x8000c0 <__TEXT_REGION_LENGTH__+0x7000c0>
 298:	86 fd       	sbrc	r24, 6
 29a:	02 c0       	rjmp	.+4      	; 0x2a0 <sendByte+0x10>
 29c:	12 d0       	rcall	.+36     	; 0x2c2 <patDog>
 29e:	fa cf       	rjmp	.-12     	; 0x294 <sendByte+0x4>
    UCSR0A |= _BV(TXC0);  // will clear all its interrupt flags
 2a0:	80 91 c0 00 	lds	r24, 0x00C0	; 0x8000c0 <__TEXT_REGION_LENGTH__+0x7000c0>
 2a4:	80 64       	ori	r24, 0x40	; 64
 2a6:	80 93 c0 00 	sts	0x00C0, r24	; 0x8000c0 <__TEXT_REGION_LENGTH__+0x7000c0>
 2aa:	08 95       	ret

000002ac <sendCString>:
}  // sendByte


void sendCString(const char *str)
{
 2ac:	cf 93       	push	r28
 2ae:	df 93       	push	r29
 2b0:	ec 01       	movw	r28, r24
    for( ; *str; ++str) sendByte(*str);
 2b2:	89 91       	ld	r24, Y+
 2b4:	88 23       	and	r24, r24
 2b6:	11 f0       	breq	.+4      	; 0x2bc <sendCString+0x10>
 2b8:	eb df       	rcall	.-42     	; 0x290 <sendByte>
 2ba:	fb cf       	rjmp	.-10     	; 0x2b2 <sendCString+0x6>
}  // sendCString
 2bc:	df 91       	pop	r29
 2be:	cf 91       	pop	r28
 2c0:	08 95       	ret

000002c2 <patDog>:

void patDog(void)
{
    static thyme_t last;
    enum { interval=SECOND1 } ;
    thyme_t now=thyme();
 2c2:	ad df       	rcall	.-166    	; 0x21e <thyme>
 2c4:	9c 01       	movw	r18, r24
    if(now-last>=interval) {
 2c6:	80 91 2e 02 	lds	r24, 0x022E	; 0x80022e <last.1612>
 2ca:	90 91 2f 02 	lds	r25, 0x022F	; 0x80022f <last.1612+0x1>
 2ce:	a9 01       	movw	r20, r18
 2d0:	48 1b       	sub	r20, r24
 2d2:	59 0b       	sbc	r21, r25
 2d4:	44 3f       	cpi	r20, 0xF4	; 244
 2d6:	51 05       	cpc	r21, r1
 2d8:	60 f0       	brcs	.+24     	; 0x2f2 <patDog+0x30>
        dset(watchdog);
 2da:	90 91 04 01 	lds	r25, 0x0104	; 0x800104 <__TEXT_REGION_LENGTH__+0x700104>
 2de:	90 68       	ori	r25, 0x80	; 128
 2e0:	90 93 04 01 	sts	0x0104, r25	; 0x800104 <__TEXT_REGION_LENGTH__+0x700104>
        ptog(watchdog);
 2e4:	80 e8       	ldi	r24, 0x80	; 128
 2e6:	80 93 03 01 	sts	0x0103, r24	; 0x800103 <__TEXT_REGION_LENGTH__+0x700103>
        last=now;
 2ea:	30 93 2f 02 	sts	0x022F, r19	; 0x80022f <last.1612+0x1>
 2ee:	20 93 2e 02 	sts	0x022E, r18	; 0x80022e <last.1612>
 2f2:	08 95       	ret

000002f4 <snprintf>:
 2f4:	0f 93       	push	r16
 2f6:	1f 93       	push	r17
 2f8:	cf 93       	push	r28
 2fa:	df 93       	push	r29
 2fc:	cd b7       	in	r28, 0x3d	; 61
 2fe:	de b7       	in	r29, 0x3e	; 62
 300:	2e 97       	sbiw	r28, 0x0e	; 14
 302:	0f b6       	in	r0, 0x3f	; 63
 304:	f8 94       	cli
 306:	de bf       	out	0x3e, r29	; 62
 308:	0f be       	out	0x3f, r0	; 63
 30a:	cd bf       	out	0x3d, r28	; 61
 30c:	0e 89       	ldd	r16, Y+22	; 0x16
 30e:	1f 89       	ldd	r17, Y+23	; 0x17
 310:	88 8d       	ldd	r24, Y+24	; 0x18
 312:	99 8d       	ldd	r25, Y+25	; 0x19
 314:	26 e0       	ldi	r18, 0x06	; 6
 316:	2c 83       	std	Y+4, r18	; 0x04
 318:	1a 83       	std	Y+2, r17	; 0x02
 31a:	09 83       	std	Y+1, r16	; 0x01
 31c:	97 ff       	sbrs	r25, 7
 31e:	02 c0       	rjmp	.+4      	; 0x324 <snprintf+0x30>
 320:	80 e0       	ldi	r24, 0x00	; 0
 322:	90 e8       	ldi	r25, 0x80	; 128
 324:	01 97       	sbiw	r24, 0x01	; 1
 326:	9e 83       	std	Y+6, r25	; 0x06
 328:	8d 83       	std	Y+5, r24	; 0x05
 32a:	ae 01       	movw	r20, r28
 32c:	44 5e       	subi	r20, 0xE4	; 228
 32e:	5f 4f       	sbci	r21, 0xFF	; 255
 330:	6a 8d       	ldd	r22, Y+26	; 0x1a
 332:	7b 8d       	ldd	r23, Y+27	; 0x1b
 334:	ce 01       	movw	r24, r28
 336:	01 96       	adiw	r24, 0x01	; 1
 338:	19 d0       	rcall	.+50     	; 0x36c <vfprintf>
 33a:	4d 81       	ldd	r20, Y+5	; 0x05
 33c:	5e 81       	ldd	r21, Y+6	; 0x06
 33e:	57 fd       	sbrc	r21, 7
 340:	0a c0       	rjmp	.+20     	; 0x356 <snprintf+0x62>
 342:	2f 81       	ldd	r18, Y+7	; 0x07
 344:	38 85       	ldd	r19, Y+8	; 0x08
 346:	42 17       	cp	r20, r18
 348:	53 07       	cpc	r21, r19
 34a:	0c f4       	brge	.+2      	; 0x34e <snprintf+0x5a>
 34c:	9a 01       	movw	r18, r20
 34e:	f8 01       	movw	r30, r16
 350:	e2 0f       	add	r30, r18
 352:	f3 1f       	adc	r31, r19
 354:	10 82       	st	Z, r1
 356:	2e 96       	adiw	r28, 0x0e	; 14
 358:	0f b6       	in	r0, 0x3f	; 63
 35a:	f8 94       	cli
 35c:	de bf       	out	0x3e, r29	; 62
 35e:	0f be       	out	0x3f, r0	; 63
 360:	cd bf       	out	0x3d, r28	; 61
 362:	df 91       	pop	r29
 364:	cf 91       	pop	r28
 366:	1f 91       	pop	r17
 368:	0f 91       	pop	r16
 36a:	08 95       	ret

0000036c <vfprintf>:
 36c:	2f 92       	push	r2
 36e:	3f 92       	push	r3
 370:	4f 92       	push	r4
 372:	5f 92       	push	r5
 374:	6f 92       	push	r6
 376:	7f 92       	push	r7
 378:	8f 92       	push	r8
 37a:	9f 92       	push	r9
 37c:	af 92       	push	r10
 37e:	bf 92       	push	r11
 380:	cf 92       	push	r12
 382:	df 92       	push	r13
 384:	ef 92       	push	r14
 386:	ff 92       	push	r15
 388:	0f 93       	push	r16
 38a:	1f 93       	push	r17
 38c:	cf 93       	push	r28
 38e:	df 93       	push	r29
 390:	cd b7       	in	r28, 0x3d	; 61
 392:	de b7       	in	r29, 0x3e	; 62
 394:	2b 97       	sbiw	r28, 0x0b	; 11
 396:	0f b6       	in	r0, 0x3f	; 63
 398:	f8 94       	cli
 39a:	de bf       	out	0x3e, r29	; 62
 39c:	0f be       	out	0x3f, r0	; 63
 39e:	cd bf       	out	0x3d, r28	; 61
 3a0:	6c 01       	movw	r12, r24
 3a2:	7b 01       	movw	r14, r22
 3a4:	8a 01       	movw	r16, r20
 3a6:	fc 01       	movw	r30, r24
 3a8:	17 82       	std	Z+7, r1	; 0x07
 3aa:	16 82       	std	Z+6, r1	; 0x06
 3ac:	83 81       	ldd	r24, Z+3	; 0x03
 3ae:	81 ff       	sbrs	r24, 1
 3b0:	bf c1       	rjmp	.+894    	; 0x730 <__LOCK_REGION_LENGTH__+0x330>
 3b2:	ce 01       	movw	r24, r28
 3b4:	01 96       	adiw	r24, 0x01	; 1
 3b6:	3c 01       	movw	r6, r24
 3b8:	f6 01       	movw	r30, r12
 3ba:	93 81       	ldd	r25, Z+3	; 0x03
 3bc:	f7 01       	movw	r30, r14
 3be:	93 fd       	sbrc	r25, 3
 3c0:	85 91       	lpm	r24, Z+
 3c2:	93 ff       	sbrs	r25, 3
 3c4:	81 91       	ld	r24, Z+
 3c6:	7f 01       	movw	r14, r30
 3c8:	88 23       	and	r24, r24
 3ca:	09 f4       	brne	.+2      	; 0x3ce <vfprintf+0x62>
 3cc:	ad c1       	rjmp	.+858    	; 0x728 <__LOCK_REGION_LENGTH__+0x328>
 3ce:	85 32       	cpi	r24, 0x25	; 37
 3d0:	39 f4       	brne	.+14     	; 0x3e0 <vfprintf+0x74>
 3d2:	93 fd       	sbrc	r25, 3
 3d4:	85 91       	lpm	r24, Z+
 3d6:	93 ff       	sbrs	r25, 3
 3d8:	81 91       	ld	r24, Z+
 3da:	7f 01       	movw	r14, r30
 3dc:	85 32       	cpi	r24, 0x25	; 37
 3de:	21 f4       	brne	.+8      	; 0x3e8 <vfprintf+0x7c>
 3e0:	b6 01       	movw	r22, r12
 3e2:	90 e0       	ldi	r25, 0x00	; 0
 3e4:	d6 d1       	rcall	.+940    	; 0x792 <fputc>
 3e6:	e8 cf       	rjmp	.-48     	; 0x3b8 <vfprintf+0x4c>
 3e8:	91 2c       	mov	r9, r1
 3ea:	21 2c       	mov	r2, r1
 3ec:	31 2c       	mov	r3, r1
 3ee:	ff e1       	ldi	r31, 0x1F	; 31
 3f0:	f3 15       	cp	r31, r3
 3f2:	d8 f0       	brcs	.+54     	; 0x42a <__LOCK_REGION_LENGTH__+0x2a>
 3f4:	8b 32       	cpi	r24, 0x2B	; 43
 3f6:	79 f0       	breq	.+30     	; 0x416 <__LOCK_REGION_LENGTH__+0x16>
 3f8:	38 f4       	brcc	.+14     	; 0x408 <__LOCK_REGION_LENGTH__+0x8>
 3fa:	80 32       	cpi	r24, 0x20	; 32
 3fc:	79 f0       	breq	.+30     	; 0x41c <__LOCK_REGION_LENGTH__+0x1c>
 3fe:	83 32       	cpi	r24, 0x23	; 35
 400:	a1 f4       	brne	.+40     	; 0x42a <__LOCK_REGION_LENGTH__+0x2a>
 402:	23 2d       	mov	r18, r3
 404:	20 61       	ori	r18, 0x10	; 16
 406:	1d c0       	rjmp	.+58     	; 0x442 <__LOCK_REGION_LENGTH__+0x42>
 408:	8d 32       	cpi	r24, 0x2D	; 45
 40a:	61 f0       	breq	.+24     	; 0x424 <__LOCK_REGION_LENGTH__+0x24>
 40c:	80 33       	cpi	r24, 0x30	; 48
 40e:	69 f4       	brne	.+26     	; 0x42a <__LOCK_REGION_LENGTH__+0x2a>
 410:	23 2d       	mov	r18, r3
 412:	21 60       	ori	r18, 0x01	; 1
 414:	16 c0       	rjmp	.+44     	; 0x442 <__LOCK_REGION_LENGTH__+0x42>
 416:	83 2d       	mov	r24, r3
 418:	82 60       	ori	r24, 0x02	; 2
 41a:	38 2e       	mov	r3, r24
 41c:	e3 2d       	mov	r30, r3
 41e:	e4 60       	ori	r30, 0x04	; 4
 420:	3e 2e       	mov	r3, r30
 422:	2a c0       	rjmp	.+84     	; 0x478 <__LOCK_REGION_LENGTH__+0x78>
 424:	f3 2d       	mov	r31, r3
 426:	f8 60       	ori	r31, 0x08	; 8
 428:	1d c0       	rjmp	.+58     	; 0x464 <__LOCK_REGION_LENGTH__+0x64>
 42a:	37 fc       	sbrc	r3, 7
 42c:	2d c0       	rjmp	.+90     	; 0x488 <__LOCK_REGION_LENGTH__+0x88>
 42e:	20 ed       	ldi	r18, 0xD0	; 208
 430:	28 0f       	add	r18, r24
 432:	2a 30       	cpi	r18, 0x0A	; 10
 434:	40 f0       	brcs	.+16     	; 0x446 <__LOCK_REGION_LENGTH__+0x46>
 436:	8e 32       	cpi	r24, 0x2E	; 46
 438:	b9 f4       	brne	.+46     	; 0x468 <__LOCK_REGION_LENGTH__+0x68>
 43a:	36 fc       	sbrc	r3, 6
 43c:	75 c1       	rjmp	.+746    	; 0x728 <__LOCK_REGION_LENGTH__+0x328>
 43e:	23 2d       	mov	r18, r3
 440:	20 64       	ori	r18, 0x40	; 64
 442:	32 2e       	mov	r3, r18
 444:	19 c0       	rjmp	.+50     	; 0x478 <__LOCK_REGION_LENGTH__+0x78>
 446:	36 fe       	sbrs	r3, 6
 448:	06 c0       	rjmp	.+12     	; 0x456 <__LOCK_REGION_LENGTH__+0x56>
 44a:	8a e0       	ldi	r24, 0x0A	; 10
 44c:	98 9e       	mul	r9, r24
 44e:	20 0d       	add	r18, r0
 450:	11 24       	eor	r1, r1
 452:	92 2e       	mov	r9, r18
 454:	11 c0       	rjmp	.+34     	; 0x478 <__LOCK_REGION_LENGTH__+0x78>
 456:	ea e0       	ldi	r30, 0x0A	; 10
 458:	2e 9e       	mul	r2, r30
 45a:	20 0d       	add	r18, r0
 45c:	11 24       	eor	r1, r1
 45e:	22 2e       	mov	r2, r18
 460:	f3 2d       	mov	r31, r3
 462:	f0 62       	ori	r31, 0x20	; 32
 464:	3f 2e       	mov	r3, r31
 466:	08 c0       	rjmp	.+16     	; 0x478 <__LOCK_REGION_LENGTH__+0x78>
 468:	8c 36       	cpi	r24, 0x6C	; 108
 46a:	21 f4       	brne	.+8      	; 0x474 <__LOCK_REGION_LENGTH__+0x74>
 46c:	83 2d       	mov	r24, r3
 46e:	80 68       	ori	r24, 0x80	; 128
 470:	38 2e       	mov	r3, r24
 472:	02 c0       	rjmp	.+4      	; 0x478 <__LOCK_REGION_LENGTH__+0x78>
 474:	88 36       	cpi	r24, 0x68	; 104
 476:	41 f4       	brne	.+16     	; 0x488 <__LOCK_REGION_LENGTH__+0x88>
 478:	f7 01       	movw	r30, r14
 47a:	93 fd       	sbrc	r25, 3
 47c:	85 91       	lpm	r24, Z+
 47e:	93 ff       	sbrs	r25, 3
 480:	81 91       	ld	r24, Z+
 482:	7f 01       	movw	r14, r30
 484:	81 11       	cpse	r24, r1
 486:	b3 cf       	rjmp	.-154    	; 0x3ee <vfprintf+0x82>
 488:	98 2f       	mov	r25, r24
 48a:	9f 7d       	andi	r25, 0xDF	; 223
 48c:	95 54       	subi	r25, 0x45	; 69
 48e:	93 30       	cpi	r25, 0x03	; 3
 490:	28 f4       	brcc	.+10     	; 0x49c <__LOCK_REGION_LENGTH__+0x9c>
 492:	0c 5f       	subi	r16, 0xFC	; 252
 494:	1f 4f       	sbci	r17, 0xFF	; 255
 496:	9f e3       	ldi	r25, 0x3F	; 63
 498:	99 83       	std	Y+1, r25	; 0x01
 49a:	0d c0       	rjmp	.+26     	; 0x4b6 <__LOCK_REGION_LENGTH__+0xb6>
 49c:	83 36       	cpi	r24, 0x63	; 99
 49e:	31 f0       	breq	.+12     	; 0x4ac <__LOCK_REGION_LENGTH__+0xac>
 4a0:	83 37       	cpi	r24, 0x73	; 115
 4a2:	71 f0       	breq	.+28     	; 0x4c0 <__LOCK_REGION_LENGTH__+0xc0>
 4a4:	83 35       	cpi	r24, 0x53	; 83
 4a6:	09 f0       	breq	.+2      	; 0x4aa <__LOCK_REGION_LENGTH__+0xaa>
 4a8:	55 c0       	rjmp	.+170    	; 0x554 <__LOCK_REGION_LENGTH__+0x154>
 4aa:	20 c0       	rjmp	.+64     	; 0x4ec <__LOCK_REGION_LENGTH__+0xec>
 4ac:	f8 01       	movw	r30, r16
 4ae:	80 81       	ld	r24, Z
 4b0:	89 83       	std	Y+1, r24	; 0x01
 4b2:	0e 5f       	subi	r16, 0xFE	; 254
 4b4:	1f 4f       	sbci	r17, 0xFF	; 255
 4b6:	88 24       	eor	r8, r8
 4b8:	83 94       	inc	r8
 4ba:	91 2c       	mov	r9, r1
 4bc:	53 01       	movw	r10, r6
 4be:	12 c0       	rjmp	.+36     	; 0x4e4 <__LOCK_REGION_LENGTH__+0xe4>
 4c0:	28 01       	movw	r4, r16
 4c2:	f2 e0       	ldi	r31, 0x02	; 2
 4c4:	4f 0e       	add	r4, r31
 4c6:	51 1c       	adc	r5, r1
 4c8:	f8 01       	movw	r30, r16
 4ca:	a0 80       	ld	r10, Z
 4cc:	b1 80       	ldd	r11, Z+1	; 0x01
 4ce:	36 fe       	sbrs	r3, 6
 4d0:	03 c0       	rjmp	.+6      	; 0x4d8 <__LOCK_REGION_LENGTH__+0xd8>
 4d2:	69 2d       	mov	r22, r9
 4d4:	70 e0       	ldi	r23, 0x00	; 0
 4d6:	02 c0       	rjmp	.+4      	; 0x4dc <__LOCK_REGION_LENGTH__+0xdc>
 4d8:	6f ef       	ldi	r22, 0xFF	; 255
 4da:	7f ef       	ldi	r23, 0xFF	; 255
 4dc:	c5 01       	movw	r24, r10
 4de:	4e d1       	rcall	.+668    	; 0x77c <strnlen>
 4e0:	4c 01       	movw	r8, r24
 4e2:	82 01       	movw	r16, r4
 4e4:	f3 2d       	mov	r31, r3
 4e6:	ff 77       	andi	r31, 0x7F	; 127
 4e8:	3f 2e       	mov	r3, r31
 4ea:	15 c0       	rjmp	.+42     	; 0x516 <__LOCK_REGION_LENGTH__+0x116>
 4ec:	28 01       	movw	r4, r16
 4ee:	22 e0       	ldi	r18, 0x02	; 2
 4f0:	42 0e       	add	r4, r18
 4f2:	51 1c       	adc	r5, r1
 4f4:	f8 01       	movw	r30, r16
 4f6:	a0 80       	ld	r10, Z
 4f8:	b1 80       	ldd	r11, Z+1	; 0x01
 4fa:	36 fe       	sbrs	r3, 6
 4fc:	03 c0       	rjmp	.+6      	; 0x504 <__LOCK_REGION_LENGTH__+0x104>
 4fe:	69 2d       	mov	r22, r9
 500:	70 e0       	ldi	r23, 0x00	; 0
 502:	02 c0       	rjmp	.+4      	; 0x508 <__LOCK_REGION_LENGTH__+0x108>
 504:	6f ef       	ldi	r22, 0xFF	; 255
 506:	7f ef       	ldi	r23, 0xFF	; 255
 508:	c5 01       	movw	r24, r10
 50a:	2d d1       	rcall	.+602    	; 0x766 <strnlen_P>
 50c:	4c 01       	movw	r8, r24
 50e:	f3 2d       	mov	r31, r3
 510:	f0 68       	ori	r31, 0x80	; 128
 512:	3f 2e       	mov	r3, r31
 514:	82 01       	movw	r16, r4
 516:	33 fc       	sbrc	r3, 3
 518:	19 c0       	rjmp	.+50     	; 0x54c <__LOCK_REGION_LENGTH__+0x14c>
 51a:	82 2d       	mov	r24, r2
 51c:	90 e0       	ldi	r25, 0x00	; 0
 51e:	88 16       	cp	r8, r24
 520:	99 06       	cpc	r9, r25
 522:	a0 f4       	brcc	.+40     	; 0x54c <__LOCK_REGION_LENGTH__+0x14c>
 524:	b6 01       	movw	r22, r12
 526:	80 e2       	ldi	r24, 0x20	; 32
 528:	90 e0       	ldi	r25, 0x00	; 0
 52a:	33 d1       	rcall	.+614    	; 0x792 <fputc>
 52c:	2a 94       	dec	r2
 52e:	f5 cf       	rjmp	.-22     	; 0x51a <__LOCK_REGION_LENGTH__+0x11a>
 530:	f5 01       	movw	r30, r10
 532:	37 fc       	sbrc	r3, 7
 534:	85 91       	lpm	r24, Z+
 536:	37 fe       	sbrs	r3, 7
 538:	81 91       	ld	r24, Z+
 53a:	5f 01       	movw	r10, r30
 53c:	b6 01       	movw	r22, r12
 53e:	90 e0       	ldi	r25, 0x00	; 0
 540:	28 d1       	rcall	.+592    	; 0x792 <fputc>
 542:	21 10       	cpse	r2, r1
 544:	2a 94       	dec	r2
 546:	21 e0       	ldi	r18, 0x01	; 1
 548:	82 1a       	sub	r8, r18
 54a:	91 08       	sbc	r9, r1
 54c:	81 14       	cp	r8, r1
 54e:	91 04       	cpc	r9, r1
 550:	79 f7       	brne	.-34     	; 0x530 <__LOCK_REGION_LENGTH__+0x130>
 552:	e1 c0       	rjmp	.+450    	; 0x716 <__LOCK_REGION_LENGTH__+0x316>
 554:	84 36       	cpi	r24, 0x64	; 100
 556:	11 f0       	breq	.+4      	; 0x55c <__LOCK_REGION_LENGTH__+0x15c>
 558:	89 36       	cpi	r24, 0x69	; 105
 55a:	39 f5       	brne	.+78     	; 0x5aa <__LOCK_REGION_LENGTH__+0x1aa>
 55c:	f8 01       	movw	r30, r16
 55e:	37 fe       	sbrs	r3, 7
 560:	07 c0       	rjmp	.+14     	; 0x570 <__LOCK_REGION_LENGTH__+0x170>
 562:	60 81       	ld	r22, Z
 564:	71 81       	ldd	r23, Z+1	; 0x01
 566:	82 81       	ldd	r24, Z+2	; 0x02
 568:	93 81       	ldd	r25, Z+3	; 0x03
 56a:	0c 5f       	subi	r16, 0xFC	; 252
 56c:	1f 4f       	sbci	r17, 0xFF	; 255
 56e:	08 c0       	rjmp	.+16     	; 0x580 <__LOCK_REGION_LENGTH__+0x180>
 570:	60 81       	ld	r22, Z
 572:	71 81       	ldd	r23, Z+1	; 0x01
 574:	07 2e       	mov	r0, r23
 576:	00 0c       	add	r0, r0
 578:	88 0b       	sbc	r24, r24
 57a:	99 0b       	sbc	r25, r25
 57c:	0e 5f       	subi	r16, 0xFE	; 254
 57e:	1f 4f       	sbci	r17, 0xFF	; 255
 580:	f3 2d       	mov	r31, r3
 582:	ff 76       	andi	r31, 0x6F	; 111
 584:	3f 2e       	mov	r3, r31
 586:	97 ff       	sbrs	r25, 7
 588:	09 c0       	rjmp	.+18     	; 0x59c <__LOCK_REGION_LENGTH__+0x19c>
 58a:	90 95       	com	r25
 58c:	80 95       	com	r24
 58e:	70 95       	com	r23
 590:	61 95       	neg	r22
 592:	7f 4f       	sbci	r23, 0xFF	; 255
 594:	8f 4f       	sbci	r24, 0xFF	; 255
 596:	9f 4f       	sbci	r25, 0xFF	; 255
 598:	f0 68       	ori	r31, 0x80	; 128
 59a:	3f 2e       	mov	r3, r31
 59c:	2a e0       	ldi	r18, 0x0A	; 10
 59e:	30 e0       	ldi	r19, 0x00	; 0
 5a0:	a3 01       	movw	r20, r6
 5a2:	33 d1       	rcall	.+614    	; 0x80a <__ultoa_invert>
 5a4:	88 2e       	mov	r8, r24
 5a6:	86 18       	sub	r8, r6
 5a8:	44 c0       	rjmp	.+136    	; 0x632 <__LOCK_REGION_LENGTH__+0x232>
 5aa:	85 37       	cpi	r24, 0x75	; 117
 5ac:	31 f4       	brne	.+12     	; 0x5ba <__LOCK_REGION_LENGTH__+0x1ba>
 5ae:	23 2d       	mov	r18, r3
 5b0:	2f 7e       	andi	r18, 0xEF	; 239
 5b2:	b2 2e       	mov	r11, r18
 5b4:	2a e0       	ldi	r18, 0x0A	; 10
 5b6:	30 e0       	ldi	r19, 0x00	; 0
 5b8:	25 c0       	rjmp	.+74     	; 0x604 <__LOCK_REGION_LENGTH__+0x204>
 5ba:	93 2d       	mov	r25, r3
 5bc:	99 7f       	andi	r25, 0xF9	; 249
 5be:	b9 2e       	mov	r11, r25
 5c0:	8f 36       	cpi	r24, 0x6F	; 111
 5c2:	c1 f0       	breq	.+48     	; 0x5f4 <__LOCK_REGION_LENGTH__+0x1f4>
 5c4:	18 f4       	brcc	.+6      	; 0x5cc <__LOCK_REGION_LENGTH__+0x1cc>
 5c6:	88 35       	cpi	r24, 0x58	; 88
 5c8:	79 f0       	breq	.+30     	; 0x5e8 <__LOCK_REGION_LENGTH__+0x1e8>
 5ca:	ae c0       	rjmp	.+348    	; 0x728 <__LOCK_REGION_LENGTH__+0x328>
 5cc:	80 37       	cpi	r24, 0x70	; 112
 5ce:	19 f0       	breq	.+6      	; 0x5d6 <__LOCK_REGION_LENGTH__+0x1d6>
 5d0:	88 37       	cpi	r24, 0x78	; 120
 5d2:	21 f0       	breq	.+8      	; 0x5dc <__LOCK_REGION_LENGTH__+0x1dc>
 5d4:	a9 c0       	rjmp	.+338    	; 0x728 <__LOCK_REGION_LENGTH__+0x328>
 5d6:	e9 2f       	mov	r30, r25
 5d8:	e0 61       	ori	r30, 0x10	; 16
 5da:	be 2e       	mov	r11, r30
 5dc:	b4 fe       	sbrs	r11, 4
 5de:	0d c0       	rjmp	.+26     	; 0x5fa <__LOCK_REGION_LENGTH__+0x1fa>
 5e0:	fb 2d       	mov	r31, r11
 5e2:	f4 60       	ori	r31, 0x04	; 4
 5e4:	bf 2e       	mov	r11, r31
 5e6:	09 c0       	rjmp	.+18     	; 0x5fa <__LOCK_REGION_LENGTH__+0x1fa>
 5e8:	34 fe       	sbrs	r3, 4
 5ea:	0a c0       	rjmp	.+20     	; 0x600 <__LOCK_REGION_LENGTH__+0x200>
 5ec:	29 2f       	mov	r18, r25
 5ee:	26 60       	ori	r18, 0x06	; 6
 5f0:	b2 2e       	mov	r11, r18
 5f2:	06 c0       	rjmp	.+12     	; 0x600 <__LOCK_REGION_LENGTH__+0x200>
 5f4:	28 e0       	ldi	r18, 0x08	; 8
 5f6:	30 e0       	ldi	r19, 0x00	; 0
 5f8:	05 c0       	rjmp	.+10     	; 0x604 <__LOCK_REGION_LENGTH__+0x204>
 5fa:	20 e1       	ldi	r18, 0x10	; 16
 5fc:	30 e0       	ldi	r19, 0x00	; 0
 5fe:	02 c0       	rjmp	.+4      	; 0x604 <__LOCK_REGION_LENGTH__+0x204>
 600:	20 e1       	ldi	r18, 0x10	; 16
 602:	32 e0       	ldi	r19, 0x02	; 2
 604:	f8 01       	movw	r30, r16
 606:	b7 fe       	sbrs	r11, 7
 608:	07 c0       	rjmp	.+14     	; 0x618 <__LOCK_REGION_LENGTH__+0x218>
 60a:	60 81       	ld	r22, Z
 60c:	71 81       	ldd	r23, Z+1	; 0x01
 60e:	82 81       	ldd	r24, Z+2	; 0x02
 610:	93 81       	ldd	r25, Z+3	; 0x03
 612:	0c 5f       	subi	r16, 0xFC	; 252
 614:	1f 4f       	sbci	r17, 0xFF	; 255
 616:	06 c0       	rjmp	.+12     	; 0x624 <__LOCK_REGION_LENGTH__+0x224>
 618:	60 81       	ld	r22, Z
 61a:	71 81       	ldd	r23, Z+1	; 0x01
 61c:	80 e0       	ldi	r24, 0x00	; 0
 61e:	90 e0       	ldi	r25, 0x00	; 0
 620:	0e 5f       	subi	r16, 0xFE	; 254
 622:	1f 4f       	sbci	r17, 0xFF	; 255
 624:	a3 01       	movw	r20, r6
 626:	f1 d0       	rcall	.+482    	; 0x80a <__ultoa_invert>
 628:	88 2e       	mov	r8, r24
 62a:	86 18       	sub	r8, r6
 62c:	fb 2d       	mov	r31, r11
 62e:	ff 77       	andi	r31, 0x7F	; 127
 630:	3f 2e       	mov	r3, r31
 632:	36 fe       	sbrs	r3, 6
 634:	0d c0       	rjmp	.+26     	; 0x650 <__LOCK_REGION_LENGTH__+0x250>
 636:	23 2d       	mov	r18, r3
 638:	2e 7f       	andi	r18, 0xFE	; 254
 63a:	a2 2e       	mov	r10, r18
 63c:	89 14       	cp	r8, r9
 63e:	58 f4       	brcc	.+22     	; 0x656 <__LOCK_REGION_LENGTH__+0x256>
 640:	34 fe       	sbrs	r3, 4
 642:	0b c0       	rjmp	.+22     	; 0x65a <__LOCK_REGION_LENGTH__+0x25a>
 644:	32 fc       	sbrc	r3, 2
 646:	09 c0       	rjmp	.+18     	; 0x65a <__LOCK_REGION_LENGTH__+0x25a>
 648:	83 2d       	mov	r24, r3
 64a:	8e 7e       	andi	r24, 0xEE	; 238
 64c:	a8 2e       	mov	r10, r24
 64e:	05 c0       	rjmp	.+10     	; 0x65a <__LOCK_REGION_LENGTH__+0x25a>
 650:	b8 2c       	mov	r11, r8
 652:	a3 2c       	mov	r10, r3
 654:	03 c0       	rjmp	.+6      	; 0x65c <__LOCK_REGION_LENGTH__+0x25c>
 656:	b8 2c       	mov	r11, r8
 658:	01 c0       	rjmp	.+2      	; 0x65c <__LOCK_REGION_LENGTH__+0x25c>
 65a:	b9 2c       	mov	r11, r9
 65c:	a4 fe       	sbrs	r10, 4
 65e:	0f c0       	rjmp	.+30     	; 0x67e <__LOCK_REGION_LENGTH__+0x27e>
 660:	fe 01       	movw	r30, r28
 662:	e8 0d       	add	r30, r8
 664:	f1 1d       	adc	r31, r1
 666:	80 81       	ld	r24, Z
 668:	80 33       	cpi	r24, 0x30	; 48
 66a:	21 f4       	brne	.+8      	; 0x674 <__LOCK_REGION_LENGTH__+0x274>
 66c:	9a 2d       	mov	r25, r10
 66e:	99 7e       	andi	r25, 0xE9	; 233
 670:	a9 2e       	mov	r10, r25
 672:	09 c0       	rjmp	.+18     	; 0x686 <__LOCK_REGION_LENGTH__+0x286>
 674:	a2 fe       	sbrs	r10, 2
 676:	06 c0       	rjmp	.+12     	; 0x684 <__LOCK_REGION_LENGTH__+0x284>
 678:	b3 94       	inc	r11
 67a:	b3 94       	inc	r11
 67c:	04 c0       	rjmp	.+8      	; 0x686 <__LOCK_REGION_LENGTH__+0x286>
 67e:	8a 2d       	mov	r24, r10
 680:	86 78       	andi	r24, 0x86	; 134
 682:	09 f0       	breq	.+2      	; 0x686 <__LOCK_REGION_LENGTH__+0x286>
 684:	b3 94       	inc	r11
 686:	a3 fc       	sbrc	r10, 3
 688:	10 c0       	rjmp	.+32     	; 0x6aa <__LOCK_REGION_LENGTH__+0x2aa>
 68a:	a0 fe       	sbrs	r10, 0
 68c:	06 c0       	rjmp	.+12     	; 0x69a <__LOCK_REGION_LENGTH__+0x29a>
 68e:	b2 14       	cp	r11, r2
 690:	80 f4       	brcc	.+32     	; 0x6b2 <__LOCK_REGION_LENGTH__+0x2b2>
 692:	28 0c       	add	r2, r8
 694:	92 2c       	mov	r9, r2
 696:	9b 18       	sub	r9, r11
 698:	0d c0       	rjmp	.+26     	; 0x6b4 <__LOCK_REGION_LENGTH__+0x2b4>
 69a:	b2 14       	cp	r11, r2
 69c:	58 f4       	brcc	.+22     	; 0x6b4 <__LOCK_REGION_LENGTH__+0x2b4>
 69e:	b6 01       	movw	r22, r12
 6a0:	80 e2       	ldi	r24, 0x20	; 32
 6a2:	90 e0       	ldi	r25, 0x00	; 0
 6a4:	76 d0       	rcall	.+236    	; 0x792 <fputc>
 6a6:	b3 94       	inc	r11
 6a8:	f8 cf       	rjmp	.-16     	; 0x69a <__LOCK_REGION_LENGTH__+0x29a>
 6aa:	b2 14       	cp	r11, r2
 6ac:	18 f4       	brcc	.+6      	; 0x6b4 <__LOCK_REGION_LENGTH__+0x2b4>
 6ae:	2b 18       	sub	r2, r11
 6b0:	02 c0       	rjmp	.+4      	; 0x6b6 <__LOCK_REGION_LENGTH__+0x2b6>
 6b2:	98 2c       	mov	r9, r8
 6b4:	21 2c       	mov	r2, r1
 6b6:	a4 fe       	sbrs	r10, 4
 6b8:	0f c0       	rjmp	.+30     	; 0x6d8 <__LOCK_REGION_LENGTH__+0x2d8>
 6ba:	b6 01       	movw	r22, r12
 6bc:	80 e3       	ldi	r24, 0x30	; 48
 6be:	90 e0       	ldi	r25, 0x00	; 0
 6c0:	68 d0       	rcall	.+208    	; 0x792 <fputc>
 6c2:	a2 fe       	sbrs	r10, 2
 6c4:	16 c0       	rjmp	.+44     	; 0x6f2 <__LOCK_REGION_LENGTH__+0x2f2>
 6c6:	a1 fc       	sbrc	r10, 1
 6c8:	03 c0       	rjmp	.+6      	; 0x6d0 <__LOCK_REGION_LENGTH__+0x2d0>
 6ca:	88 e7       	ldi	r24, 0x78	; 120
 6cc:	90 e0       	ldi	r25, 0x00	; 0
 6ce:	02 c0       	rjmp	.+4      	; 0x6d4 <__LOCK_REGION_LENGTH__+0x2d4>
 6d0:	88 e5       	ldi	r24, 0x58	; 88
 6d2:	90 e0       	ldi	r25, 0x00	; 0
 6d4:	b6 01       	movw	r22, r12
 6d6:	0c c0       	rjmp	.+24     	; 0x6f0 <__LOCK_REGION_LENGTH__+0x2f0>
 6d8:	8a 2d       	mov	r24, r10
 6da:	86 78       	andi	r24, 0x86	; 134
 6dc:	51 f0       	breq	.+20     	; 0x6f2 <__LOCK_REGION_LENGTH__+0x2f2>
 6de:	a1 fe       	sbrs	r10, 1
 6e0:	02 c0       	rjmp	.+4      	; 0x6e6 <__LOCK_REGION_LENGTH__+0x2e6>
 6e2:	8b e2       	ldi	r24, 0x2B	; 43
 6e4:	01 c0       	rjmp	.+2      	; 0x6e8 <__LOCK_REGION_LENGTH__+0x2e8>
 6e6:	80 e2       	ldi	r24, 0x20	; 32
 6e8:	a7 fc       	sbrc	r10, 7
 6ea:	8d e2       	ldi	r24, 0x2D	; 45
 6ec:	b6 01       	movw	r22, r12
 6ee:	90 e0       	ldi	r25, 0x00	; 0
 6f0:	50 d0       	rcall	.+160    	; 0x792 <fputc>
 6f2:	89 14       	cp	r8, r9
 6f4:	30 f4       	brcc	.+12     	; 0x702 <__LOCK_REGION_LENGTH__+0x302>
 6f6:	b6 01       	movw	r22, r12
 6f8:	80 e3       	ldi	r24, 0x30	; 48
 6fa:	90 e0       	ldi	r25, 0x00	; 0
 6fc:	4a d0       	rcall	.+148    	; 0x792 <fputc>
 6fe:	9a 94       	dec	r9
 700:	f8 cf       	rjmp	.-16     	; 0x6f2 <__LOCK_REGION_LENGTH__+0x2f2>
 702:	8a 94       	dec	r8
 704:	f3 01       	movw	r30, r6
 706:	e8 0d       	add	r30, r8
 708:	f1 1d       	adc	r31, r1
 70a:	80 81       	ld	r24, Z
 70c:	b6 01       	movw	r22, r12
 70e:	90 e0       	ldi	r25, 0x00	; 0
 710:	40 d0       	rcall	.+128    	; 0x792 <fputc>
 712:	81 10       	cpse	r8, r1
 714:	f6 cf       	rjmp	.-20     	; 0x702 <__LOCK_REGION_LENGTH__+0x302>
 716:	22 20       	and	r2, r2
 718:	09 f4       	brne	.+2      	; 0x71c <__LOCK_REGION_LENGTH__+0x31c>
 71a:	4e ce       	rjmp	.-868    	; 0x3b8 <vfprintf+0x4c>
 71c:	b6 01       	movw	r22, r12
 71e:	80 e2       	ldi	r24, 0x20	; 32
 720:	90 e0       	ldi	r25, 0x00	; 0
 722:	37 d0       	rcall	.+110    	; 0x792 <fputc>
 724:	2a 94       	dec	r2
 726:	f7 cf       	rjmp	.-18     	; 0x716 <__LOCK_REGION_LENGTH__+0x316>
 728:	f6 01       	movw	r30, r12
 72a:	86 81       	ldd	r24, Z+6	; 0x06
 72c:	97 81       	ldd	r25, Z+7	; 0x07
 72e:	02 c0       	rjmp	.+4      	; 0x734 <__LOCK_REGION_LENGTH__+0x334>
 730:	8f ef       	ldi	r24, 0xFF	; 255
 732:	9f ef       	ldi	r25, 0xFF	; 255
 734:	2b 96       	adiw	r28, 0x0b	; 11
 736:	0f b6       	in	r0, 0x3f	; 63
 738:	f8 94       	cli
 73a:	de bf       	out	0x3e, r29	; 62
 73c:	0f be       	out	0x3f, r0	; 63
 73e:	cd bf       	out	0x3d, r28	; 61
 740:	df 91       	pop	r29
 742:	cf 91       	pop	r28
 744:	1f 91       	pop	r17
 746:	0f 91       	pop	r16
 748:	ff 90       	pop	r15
 74a:	ef 90       	pop	r14
 74c:	df 90       	pop	r13
 74e:	cf 90       	pop	r12
 750:	bf 90       	pop	r11
 752:	af 90       	pop	r10
 754:	9f 90       	pop	r9
 756:	8f 90       	pop	r8
 758:	7f 90       	pop	r7
 75a:	6f 90       	pop	r6
 75c:	5f 90       	pop	r5
 75e:	4f 90       	pop	r4
 760:	3f 90       	pop	r3
 762:	2f 90       	pop	r2
 764:	08 95       	ret

00000766 <strnlen_P>:
 766:	fc 01       	movw	r30, r24
 768:	05 90       	lpm	r0, Z+
 76a:	61 50       	subi	r22, 0x01	; 1
 76c:	70 40       	sbci	r23, 0x00	; 0
 76e:	01 10       	cpse	r0, r1
 770:	d8 f7       	brcc	.-10     	; 0x768 <strnlen_P+0x2>
 772:	80 95       	com	r24
 774:	90 95       	com	r25
 776:	8e 0f       	add	r24, r30
 778:	9f 1f       	adc	r25, r31
 77a:	08 95       	ret

0000077c <strnlen>:
 77c:	fc 01       	movw	r30, r24
 77e:	61 50       	subi	r22, 0x01	; 1
 780:	70 40       	sbci	r23, 0x00	; 0
 782:	01 90       	ld	r0, Z+
 784:	01 10       	cpse	r0, r1
 786:	d8 f7       	brcc	.-10     	; 0x77e <strnlen+0x2>
 788:	80 95       	com	r24
 78a:	90 95       	com	r25
 78c:	8e 0f       	add	r24, r30
 78e:	9f 1f       	adc	r25, r31
 790:	08 95       	ret

00000792 <fputc>:
 792:	0f 93       	push	r16
 794:	1f 93       	push	r17
 796:	cf 93       	push	r28
 798:	df 93       	push	r29
 79a:	fb 01       	movw	r30, r22
 79c:	23 81       	ldd	r18, Z+3	; 0x03
 79e:	21 fd       	sbrc	r18, 1
 7a0:	03 c0       	rjmp	.+6      	; 0x7a8 <fputc+0x16>
 7a2:	8f ef       	ldi	r24, 0xFF	; 255
 7a4:	9f ef       	ldi	r25, 0xFF	; 255
 7a6:	2c c0       	rjmp	.+88     	; 0x800 <fputc+0x6e>
 7a8:	22 ff       	sbrs	r18, 2
 7aa:	16 c0       	rjmp	.+44     	; 0x7d8 <fputc+0x46>
 7ac:	46 81       	ldd	r20, Z+6	; 0x06
 7ae:	57 81       	ldd	r21, Z+7	; 0x07
 7b0:	24 81       	ldd	r18, Z+4	; 0x04
 7b2:	35 81       	ldd	r19, Z+5	; 0x05
 7b4:	42 17       	cp	r20, r18
 7b6:	53 07       	cpc	r21, r19
 7b8:	44 f4       	brge	.+16     	; 0x7ca <fputc+0x38>
 7ba:	a0 81       	ld	r26, Z
 7bc:	b1 81       	ldd	r27, Z+1	; 0x01
 7be:	9d 01       	movw	r18, r26
 7c0:	2f 5f       	subi	r18, 0xFF	; 255
 7c2:	3f 4f       	sbci	r19, 0xFF	; 255
 7c4:	31 83       	std	Z+1, r19	; 0x01
 7c6:	20 83       	st	Z, r18
 7c8:	8c 93       	st	X, r24
 7ca:	26 81       	ldd	r18, Z+6	; 0x06
 7cc:	37 81       	ldd	r19, Z+7	; 0x07
 7ce:	2f 5f       	subi	r18, 0xFF	; 255
 7d0:	3f 4f       	sbci	r19, 0xFF	; 255
 7d2:	37 83       	std	Z+7, r19	; 0x07
 7d4:	26 83       	std	Z+6, r18	; 0x06
 7d6:	14 c0       	rjmp	.+40     	; 0x800 <fputc+0x6e>
 7d8:	8b 01       	movw	r16, r22
 7da:	ec 01       	movw	r28, r24
 7dc:	fb 01       	movw	r30, r22
 7de:	00 84       	ldd	r0, Z+8	; 0x08
 7e0:	f1 85       	ldd	r31, Z+9	; 0x09
 7e2:	e0 2d       	mov	r30, r0
 7e4:	19 95       	eicall
 7e6:	89 2b       	or	r24, r25
 7e8:	e1 f6       	brne	.-72     	; 0x7a2 <fputc+0x10>
 7ea:	d8 01       	movw	r26, r16
 7ec:	16 96       	adiw	r26, 0x06	; 6
 7ee:	8d 91       	ld	r24, X+
 7f0:	9c 91       	ld	r25, X
 7f2:	17 97       	sbiw	r26, 0x07	; 7
 7f4:	01 96       	adiw	r24, 0x01	; 1
 7f6:	17 96       	adiw	r26, 0x07	; 7
 7f8:	9c 93       	st	X, r25
 7fa:	8e 93       	st	-X, r24
 7fc:	16 97       	sbiw	r26, 0x06	; 6
 7fe:	ce 01       	movw	r24, r28
 800:	df 91       	pop	r29
 802:	cf 91       	pop	r28
 804:	1f 91       	pop	r17
 806:	0f 91       	pop	r16
 808:	08 95       	ret

0000080a <__ultoa_invert>:
 80a:	fa 01       	movw	r30, r20
 80c:	aa 27       	eor	r26, r26
 80e:	28 30       	cpi	r18, 0x08	; 8
 810:	51 f1       	breq	.+84     	; 0x866 <__ultoa_invert+0x5c>
 812:	20 31       	cpi	r18, 0x10	; 16
 814:	81 f1       	breq	.+96     	; 0x876 <__ultoa_invert+0x6c>
 816:	e8 94       	clt
 818:	6f 93       	push	r22
 81a:	6e 7f       	andi	r22, 0xFE	; 254
 81c:	6e 5f       	subi	r22, 0xFE	; 254
 81e:	7f 4f       	sbci	r23, 0xFF	; 255
 820:	8f 4f       	sbci	r24, 0xFF	; 255
 822:	9f 4f       	sbci	r25, 0xFF	; 255
 824:	af 4f       	sbci	r26, 0xFF	; 255
 826:	b1 e0       	ldi	r27, 0x01	; 1
 828:	3e d0       	rcall	.+124    	; 0x8a6 <__ultoa_invert+0x9c>
 82a:	b4 e0       	ldi	r27, 0x04	; 4
 82c:	3c d0       	rcall	.+120    	; 0x8a6 <__ultoa_invert+0x9c>
 82e:	67 0f       	add	r22, r23
 830:	78 1f       	adc	r23, r24
 832:	89 1f       	adc	r24, r25
 834:	9a 1f       	adc	r25, r26
 836:	a1 1d       	adc	r26, r1
 838:	68 0f       	add	r22, r24
 83a:	79 1f       	adc	r23, r25
 83c:	8a 1f       	adc	r24, r26
 83e:	91 1d       	adc	r25, r1
 840:	a1 1d       	adc	r26, r1
 842:	6a 0f       	add	r22, r26
 844:	71 1d       	adc	r23, r1
 846:	81 1d       	adc	r24, r1
 848:	91 1d       	adc	r25, r1
 84a:	a1 1d       	adc	r26, r1
 84c:	20 d0       	rcall	.+64     	; 0x88e <__ultoa_invert+0x84>
 84e:	09 f4       	brne	.+2      	; 0x852 <__ultoa_invert+0x48>
 850:	68 94       	set
 852:	3f 91       	pop	r19
 854:	2a e0       	ldi	r18, 0x0A	; 10
 856:	26 9f       	mul	r18, r22
 858:	11 24       	eor	r1, r1
 85a:	30 19       	sub	r19, r0
 85c:	30 5d       	subi	r19, 0xD0	; 208
 85e:	31 93       	st	Z+, r19
 860:	de f6       	brtc	.-74     	; 0x818 <__ultoa_invert+0xe>
 862:	cf 01       	movw	r24, r30
 864:	08 95       	ret
 866:	46 2f       	mov	r20, r22
 868:	47 70       	andi	r20, 0x07	; 7
 86a:	40 5d       	subi	r20, 0xD0	; 208
 86c:	41 93       	st	Z+, r20
 86e:	b3 e0       	ldi	r27, 0x03	; 3
 870:	0f d0       	rcall	.+30     	; 0x890 <__ultoa_invert+0x86>
 872:	c9 f7       	brne	.-14     	; 0x866 <__ultoa_invert+0x5c>
 874:	f6 cf       	rjmp	.-20     	; 0x862 <__ultoa_invert+0x58>
 876:	46 2f       	mov	r20, r22
 878:	4f 70       	andi	r20, 0x0F	; 15
 87a:	40 5d       	subi	r20, 0xD0	; 208
 87c:	4a 33       	cpi	r20, 0x3A	; 58
 87e:	18 f0       	brcs	.+6      	; 0x886 <__ultoa_invert+0x7c>
 880:	49 5d       	subi	r20, 0xD9	; 217
 882:	31 fd       	sbrc	r19, 1
 884:	40 52       	subi	r20, 0x20	; 32
 886:	41 93       	st	Z+, r20
 888:	02 d0       	rcall	.+4      	; 0x88e <__ultoa_invert+0x84>
 88a:	a9 f7       	brne	.-22     	; 0x876 <__ultoa_invert+0x6c>
 88c:	ea cf       	rjmp	.-44     	; 0x862 <__ultoa_invert+0x58>
 88e:	b4 e0       	ldi	r27, 0x04	; 4
 890:	a6 95       	lsr	r26
 892:	97 95       	ror	r25
 894:	87 95       	ror	r24
 896:	77 95       	ror	r23
 898:	67 95       	ror	r22
 89a:	ba 95       	dec	r27
 89c:	c9 f7       	brne	.-14     	; 0x890 <__ultoa_invert+0x86>
 89e:	00 97       	sbiw	r24, 0x00	; 0
 8a0:	61 05       	cpc	r22, r1
 8a2:	71 05       	cpc	r23, r1
 8a4:	08 95       	ret
 8a6:	9b 01       	movw	r18, r22
 8a8:	ac 01       	movw	r20, r24
 8aa:	0a 2e       	mov	r0, r26
 8ac:	06 94       	lsr	r0
 8ae:	57 95       	ror	r21
 8b0:	47 95       	ror	r20
 8b2:	37 95       	ror	r19
 8b4:	27 95       	ror	r18
 8b6:	ba 95       	dec	r27
 8b8:	c9 f7       	brne	.-14     	; 0x8ac <__ultoa_invert+0xa2>
 8ba:	62 0f       	add	r22, r18
 8bc:	73 1f       	adc	r23, r19
 8be:	84 1f       	adc	r24, r20
 8c0:	95 1f       	adc	r25, r21
 8c2:	a0 1d       	adc	r26, r0
 8c4:	08 95       	ret

000008c6 <_exit>:
 8c6:	f8 94       	cli

000008c8 <__stop_program>:
 8c8:	ff cf       	rjmp	.-2      	; 0x8c8 <__stop_program>

32U4  lss:


sensor2-atmega32u4.elf:     file format elf32-avr

Sections:
Idx Name          Size      VMA       LMA       File off  Algn
  0 .data         00000000  00800100  00800100  00000134  2**0
                  CONTENTS, ALLOC, LOAD, DATA
  1 .text         000000e0  00000000  00000000  00000054  2**1
                  CONTENTS, ALLOC, LOAD, READONLY, CODE
  2 .comment      00000030  00000000  00000000  00000134  2**0
                  CONTENTS, READONLY
  3 .note.gnu.avr.deviceinfo 00000040  00000000  00000000  00000164  2**2
                  CONTENTS, READONLY
  4 .debug_aranges 00000020  00000000  00000000  000001a4  2**0
                  CONTENTS, READONLY, DEBUGGING
  5 .debug_info   00000b28  00000000  00000000  000001c4  2**0
                  CONTENTS, READONLY, DEBUGGING
  6 .debug_abbrev 00000a3f  00000000  00000000  00000cec  2**0
                  CONTENTS, READONLY, DEBUGGING
  7 .debug_line   00000178  00000000  00000000  0000172b  2**0
                  CONTENTS, READONLY, DEBUGGING
  8 .debug_frame  00000024  00000000  00000000  000018a4  2**2
                  CONTENTS, READONLY, DEBUGGING
  9 .debug_str    00000551  00000000  00000000  000018c8  2**0
                  CONTENTS, READONLY, DEBUGGING
 10 .debug_loc    0000005c  00000000  00000000  00001e19  2**0
                  CONTENTS, READONLY, DEBUGGING
 11 .debug_ranges 00000010  00000000  00000000  00001e75  2**0
                  CONTENTS, READONLY, DEBUGGING

Disassembly of section .text:

00000000 <__vectors>:
   0:	55 c0       	rjmp	.+170    	; 0xac <__ctors_end>
   2:	00 00       	nop
   4:	5b c0       	rjmp	.+182    	; 0xbc <__bad_interrupt>
   6:	00 00       	nop
   8:	59 c0       	rjmp	.+178    	; 0xbc <__bad_interrupt>
   a:	00 00       	nop
   c:	57 c0       	rjmp	.+174    	; 0xbc <__bad_interrupt>
   e:	00 00       	nop
  10:	55 c0       	rjmp	.+170    	; 0xbc <__bad_interrupt>
  12:	00 00       	nop
  14:	53 c0       	rjmp	.+166    	; 0xbc <__bad_interrupt>
  16:	00 00       	nop
  18:	51 c0       	rjmp	.+162    	; 0xbc <__bad_interrupt>
  1a:	00 00       	nop
  1c:	4f c0       	rjmp	.+158    	; 0xbc <__bad_interrupt>
  1e:	00 00       	nop
  20:	4d c0       	rjmp	.+154    	; 0xbc <__bad_interrupt>
  22:	00 00       	nop
  24:	4b c0       	rjmp	.+150    	; 0xbc <__bad_interrupt>
  26:	00 00       	nop
  28:	49 c0       	rjmp	.+146    	; 0xbc <__bad_interrupt>
  2a:	00 00       	nop
  2c:	47 c0       	rjmp	.+142    	; 0xbc <__bad_interrupt>
  2e:	00 00       	nop
  30:	45 c0       	rjmp	.+138    	; 0xbc <__bad_interrupt>
  32:	00 00       	nop
  34:	43 c0       	rjmp	.+134    	; 0xbc <__bad_interrupt>
  36:	00 00       	nop
  38:	41 c0       	rjmp	.+130    	; 0xbc <__bad_interrupt>
  3a:	00 00       	nop
  3c:	3f c0       	rjmp	.+126    	; 0xbc <__bad_interrupt>
  3e:	00 00       	nop
  40:	3d c0       	rjmp	.+122    	; 0xbc <__bad_interrupt>
  42:	00 00       	nop
  44:	3b c0       	rjmp	.+118    	; 0xbc <__bad_interrupt>
  46:	00 00       	nop
  48:	39 c0       	rjmp	.+114    	; 0xbc <__bad_interrupt>
  4a:	00 00       	nop
  4c:	37 c0       	rjmp	.+110    	; 0xbc <__bad_interrupt>
  4e:	00 00       	nop
  50:	35 c0       	rjmp	.+106    	; 0xbc <__bad_interrupt>
  52:	00 00       	nop
  54:	33 c0       	rjmp	.+102    	; 0xbc <__bad_interrupt>
  56:	00 00       	nop
  58:	31 c0       	rjmp	.+98     	; 0xbc <__bad_interrupt>
  5a:	00 00       	nop
  5c:	2f c0       	rjmp	.+94     	; 0xbc <__bad_interrupt>
  5e:	00 00       	nop
  60:	2d c0       	rjmp	.+90     	; 0xbc <__bad_interrupt>
  62:	00 00       	nop
  64:	2b c0       	rjmp	.+86     	; 0xbc <__bad_interrupt>
  66:	00 00       	nop
  68:	29 c0       	rjmp	.+82     	; 0xbc <__bad_interrupt>
  6a:	00 00       	nop
  6c:	27 c0       	rjmp	.+78     	; 0xbc <__bad_interrupt>
  6e:	00 00       	nop
  70:	25 c0       	rjmp	.+74     	; 0xbc <__bad_interrupt>
  72:	00 00       	nop
  74:	23 c0       	rjmp	.+70     	; 0xbc <__bad_interrupt>
  76:	00 00       	nop
  78:	21 c0       	rjmp	.+66     	; 0xbc <__bad_interrupt>
  7a:	00 00       	nop
  7c:	1f c0       	rjmp	.+62     	; 0xbc <__bad_interrupt>
  7e:	00 00       	nop
  80:	1d c0       	rjmp	.+58     	; 0xbc <__bad_interrupt>
  82:	00 00       	nop
  84:	1b c0       	rjmp	.+54     	; 0xbc <__bad_interrupt>
  86:	00 00       	nop
  88:	19 c0       	rjmp	.+50     	; 0xbc <__bad_interrupt>
  8a:	00 00       	nop
  8c:	17 c0       	rjmp	.+46     	; 0xbc <__bad_interrupt>
  8e:	00 00       	nop
  90:	15 c0       	rjmp	.+42     	; 0xbc <__bad_interrupt>
  92:	00 00       	nop
  94:	13 c0       	rjmp	.+38     	; 0xbc <__bad_interrupt>
  96:	00 00       	nop
  98:	11 c0       	rjmp	.+34     	; 0xbc <__bad_interrupt>
  9a:	00 00       	nop
  9c:	0f c0       	rjmp	.+30     	; 0xbc <__bad_interrupt>
  9e:	00 00       	nop
  a0:	0d c0       	rjmp	.+26     	; 0xbc <__bad_interrupt>
  a2:	00 00       	nop
  a4:	0b c0       	rjmp	.+22     	; 0xbc <__bad_interrupt>
  a6:	00 00       	nop
  a8:	09 c0       	rjmp	.+18     	; 0xbc <__bad_interrupt>
	...

000000ac <__ctors_end>:
  ac:	11 24       	eor	r1, r1
  ae:	1f be       	out	0x3f, r1	; 63
  b0:	cf ef       	ldi	r28, 0xFF	; 255
  b2:	da e0       	ldi	r29, 0x0A	; 10
  b4:	de bf       	out	0x3e, r29	; 62
  b6:	cd bf       	out	0x3d, r28	; 61
  b8:	02 d0       	rcall	.+4      	; 0xbe <main>
  ba:	10 c0       	rjmp	.+32     	; 0xdc <_exit>

000000bc <__bad_interrupt>:
  bc:	a1 cf       	rjmp	.-190    	; 0x0 <__vectors>

000000be <main>:

int main(void)
{
  for(bool bit=0; ; bit=!bit) {
    dset(DOG);
    ptog(DOG);
  be:	81 e0       	ldi	r24, 0x01	; 1
#define DOG B,0

int main(void)
{
  for(bool bit=0; ; bit=!bit) {
    dset(DOG);
  c0:	20 9a       	sbi	0x04, 0	; 4
    ptog(DOG);
  c2:	83 b9       	out	0x03, r24	; 3
    if(0) {
    if(bit) { pclr(SCL); dset(SCL); }  // now driven 0
    else    { pset(SCL); dclr(SCL); }  // now pulled 1
    } else {
        dset(SCL); ptog(SCL);  // Danger! Will Robinson!
  c4:	50 9a       	sbi	0x0a, 0	; 10
  c6:	89 b9       	out	0x09, r24	; 9
	#else
		//round up by default
		__ticks_dc = (uint32_t)(ceil(fabs(__tmp)));
	#endif

	__builtin_avr_delay_cycles(__ticks_dc);
  c8:	2f ef       	ldi	r18, 0xFF	; 255
  ca:	33 e2       	ldi	r19, 0x23	; 35
  cc:	94 ef       	ldi	r25, 0xF4	; 244
  ce:	21 50       	subi	r18, 0x01	; 1
  d0:	30 40       	sbci	r19, 0x00	; 0
  d2:	90 40       	sbci	r25, 0x00	; 0
  d4:	e1 f7       	brne	.-8      	; 0xce <main+0x10>
  d6:	00 c0       	rjmp	.+0      	; 0xd8 <main+0x1a>
  d8:	00 00       	nop
  da:	f2 cf       	rjmp	.-28     	; 0xc0 <main+0x2>

000000dc <_exit>:
  dc:	f8 94       	cli

000000de <__stop_program>:
  de:	ff cf       	rjmp	.-2      	; 0xde <__stop_program>

 

I dread opening this thing up, but I think I will need to.

 

"Demons after money.
Whatever happened to the still beating heart of a virgin?
No one has any standards anymore." -- Giles

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Total votes: 0

Why was this moved?

mega & tiny is clearly correct.

Arduino is clearly wrong: all the Arduino code has been stripped out.

 

Also, what was the motivation?

mega & tiny gets a lot of post that could go into compilers and generl programming.

They do not get moved.

 

BTW I had to work at finding it again.

No bread crumbs.

"Demons after money.
Whatever happened to the still beating heart of a virgin?
No one has any standards anymore." -- Giles

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  • 5
Total votes: 0

skeeve wrote:
What else is there?

Pull up resistors on the TWI lines?  If distance is short and speed is slow enough, the internal port pull ups on the TWI master can be used.

 

Jim

Click Link: Get Free Stock: Retire early! PM for strategy

share.robinhood.com/jamesc3274
get $5 free gold/silver https://www.onegold.com/join/713...

 

 

 

 

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Total votes: 0

ki0bk wrote:
skeeve wrote:
What else is there?

Pull up resistors on the TWI lines?  If distance is short and speed is slow enough, the internal port pull ups on the TWI master can be used.

I started with internal pull-ups on the TWI pins.

According to the schematic, the TWI pins have 2k2 ohm pull-ups.

Eventually, i.e. with the current code, I decided to just drive the pins.

 

I expect a duh moment eventually, but do not know where it is coming from.

"Demons after money.
Whatever happened to the still beating heart of a virgin?
No one has any standards anymore." -- Giles

This reply has been marked as the solution. 
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The pseudo-reset in the bootloader did not turn off TWI,

hence my direct SCL manipulation had no effect.

 

Thanks to another pair of eyes belonging to a colleague.

"Demons after money.
Whatever happened to the still beating heart of a virgin?
No one has any standards anymore." -- Giles