Why debouncing applied to all ports???

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Hello,

I am running a simple external interrupt with debouncing and noticed the debounce cutoff frequency gets applied across every IO port.  I only want deboucing on the port I set.

 

Here is my code:

 

main()

{

   .

   .

   .

   // Setup the io interrupt handler //

   pio_handler_set(PIOA, ID_PIOA, PIO_PA2, PIO_IT_RISE_EDGE, My_intHandler);

 

   // Setup the debounce filter on PORTA_2 using 1Hz cutoff frequency //

   pio_set_debounce_filter(PIOA, PIO_PA2, 1);

 

   // Enable the interrupt with the base address and PORT bit mask //

   pio_enable_interrupt(PIOA, PIO_PA2);

  

   // Enable the interrupt

   NVIC_EnableIRQ(PIOA_IRQn);

 

}

 

Shouldn't the code above set an interrupt and debounce filter only on PIOA 2?

What I am seeing is the 1Hz cutoff filter gets applied to any port on PIOA.  I have some other inputs on PIOA and noticed they are being affected by the cutoff frequency.

Changing the cutoff frequency to say... 1000, changes characteristics on all inputs on PORTA as well.

Am I missing something?

 

Best,

hvo

 

 

 

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You haven't said what chip you're using. What does its datasheet say about the debounce filter?

 

Have you looked at the source code of pio_set_debounce_filter() to see what it's actually doing?

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Hello awneil,

 

You haven't said what chip you're using.

I can't imagine the choice of which Cortex M-MCUs I use would affect how a software debounce filter work, but to be specific, I am using the SAM4SD32C chip on a custom board.

 

What does its datasheet say about the debounce filter?

I interpreted the datasheet on debounce filter to be one that I can configure on one or more inputs of my choosing.

In fact, according to Atmel Software Framework webpage on Peripheral Parallel Input/output (PIO) Controller it says:  Configure Glitch or Debouncing filter for the specified input(s).

And section 31.5.9 in the SAM4S data sheet states the input glitch and deboucing filters to be: Optional input glitch and debouncing filters are independently programmable on each I/O line.

 

Have you looked at the source code of pio_set_debounce_filter() to see what it's actually doing?

Yes.  the function call sets the PIO_IFSCER register with the defined bit mask. 

Stepping through the source code shows its setting this register with the value passed by ul_mask (which is PIO_PA2 = 0x00000004).

 

 

I am seeing the debounce filter also applied to inputs PIOA 29, PIOA 30, and PIOA 31.  Why?

 

 

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a software debounce filter

The SAM3 chips have a HARDWARE debounce filter, and I think SAM4s have the same PIO controller.

The datasheet does say that it's a per-pin option.  Did you trace the code all the way down to setting of PIO_DIFSR ?

 

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Yes, I traced it down, however the SAM4S does not have PIO_DIFSR register, I believe only the SAM3XA and SAM3U has it.

Stepping through the code shows that the PIO_IFSCER register gets set as intended for the SAM4S.