Which FPGA to choose?

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Dear all
I have done some projects with xilinx FPGA's (spartan II and spartan 3) devices and altera max7000 devices.

Recently I have seen actel has IGLOO fpga's and siad in it's website that most devices are starting from .99$!! they look sexy too me!

Have anybody done project using their products?

I myself think a FPGA with 700K gates or more or about 12000 slices would be suffiectn for my embedded projects.

my 3 main concerns are cost,cost and cost!!!

So which company or familiy of devices would you recomend?

I love Digital
and you who involved in it!

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Where I used to work a friend of mine is using an Igloo FPGA with the ARM core.

Leon Heller G1HSM

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That $0.99 figure is likely for the smallest device in the cheapest package in the slowest speed grade in 100K quantities.

FPGAs in the sizes you want are more like $70 and much higher, looking at prices of Mouser.

I'm used to think in Altera's Logic Elements metrics, but a 700K gate FPGA seems to be a quite some big bold hefty FPGA to me.

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Just a question from someone who has not used FPGAs before, how many gates would it (roughly) take to implement (say) a 16550 UART?

Just so I can get a handle on the sizes you're talking about :)

-- Damien

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If you go to the Xilinx site and look up the IP for a 16550 uart, it will give you an idea of the number of cells/blocks/tiles/luts required. The concept of 'gates' is really just marketing speak - to implement one gate or 10 gates might only take one LUT (look up table) depending on the exact logic function. To implement a uart like the 16550 is really quite hungry so if you needed a number of them, your fpga resources get chewed up rather quickly. Another method is to make a uart state machine and implement a number of uarts as a block. Technologic Systems implement this strategy with their embedded linux boards. Designing logic as you would in TTL using fpgas usually results in a very in-efficient design - ram is plentiful in fpgas, so designing the logic to use ram rather than implementing registers is a much better fit in many cases.

here's a table i found:

http://www.cs.york.ac.uk/rts/doc...

Figure out the actual cost of the device as implemented on a fpga and see if that competes with a real 16550!

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Kartman wrote:

here's a table i found:

http://www.cs.york.ac.uk/rts/doc...

Figure out the actual cost of the device as implemented on a fpga and see if that competes with a real 16550!

All prices in single units from www.findchips.com

PC16550DV = $3.86 (and as high as $7 or so)

Now, let's see that table:
"UART, generic compact" = 15% of XCS250E-6 at $16.45 (Digikey)
"8250 UART" = 58% of XCS10-4 at $25.36 (Avnet Express)
"16550 UART w/FIFOs" = ??% of XCS20-4 at $39.11 (Avnet Express)

Owch...

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But in an FPGA you can delete quite some functions from a 16550 that you probably never use (who uses interrupt on ring idicator change?) and as such save on required number of LEs. A basic UART does not use much logic.

In my opinion using FPGAs for things that are available in off-the-shelf MCUs is not worth the effort or cost-effective. The power of FPGAs are when you need weird logic you cannot find ready-made. Like when you need a gazzilion UARTs or timers, or special interface logic, or need hardware accelerators.

To compare, for one design of mine I used an Altera Cyclone 1C6 (about 6000 LEs) and houses:

* Standard NIOSII at 49.152MHz
* Couple of timers
* 3 UARTS
* 3 SPI ports
* External SRAM/NVRAM bus (16 databits, 22 adressbits)
* LPC bus to connect to another FPGA
* Rotary shaft encoder decoder that synchronizes the sampling of a serially attached ADC and writes the results to memory directly (DMA), also measures the speed of the encoder and generates interrupts at specific angles of the encoder
* Couple of I/O ports for a LCD display, buttons etc

It uses about 85% IIRC.

The 1C6 is about as expensive as a mega128, but you need a config device, external flash and SRAM and 1V5 and 3V3 supplies. Of course, the total is then quite a few times more powerful than a mega128:)

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jayjay1974 wrote:

In my opinion using FPGAs for things that are available in off-the-shelf MCUs is not worth the effort or cost-effective.

Which is kind of what I have in mind - out next host processor board (running Linux) will probably have fewer integrated peripherals than what we're using now - currently using 12 serial ports (some with full flow control, most just as tx/rx) plus a bunch of other stuff. I don't think we'd use a full IP processor core, rather, the FPGA replaces the missing peripheral set and external devices we're currently using.

Like the OP said, it's a cost game, and we're at the wild-speculation stage of the project :)

-- Damien

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Damien, have a look at www.embeddedarm.com, their boards basically do what you describe - they use a SoC processor and add a fpga with a number of serial ports etc on them. I think they've made the serial port IP open source. The technique they use to build the serial ports is a lot more economical than using separate serial port blocks. Using a 'real' cpu vs one implemented in a fpga is usually more economical and you get better performance - what JayJay says is the current state of the art. In a few years time this may change ( most likely methinks).

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Kartman wrote:
Damien, have a look at www.embeddedarm.com, their boards basically do what you describe - they use a SoC processor and add a fpga with a number of serial ports etc on them. I think they've made the serial port IP open source. The technique they use to build the serial ports is a lot more economical than using separate serial port blocks. Using a 'real' cpu vs one implemented in a fpga is usually more economical and you get better performance - what JayJay says is the current state of the art. In a few years time this may change ( most likely methinks).

Interesting ideas there. Thanks for that :)

-- Damien

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Guy what are your ideas about SOC on FPGA's? they just need external falsh and ram.And you can build a powerfull beast inside the FPGA...I think a 700K gate fpga have enough resources.so which berand and family would you choose?

I love Digital
and you who involved in it!

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The system I designed was basically a SoC. Take a look at Altera's SOPC builder.

I'm not too sure about a softcore MCU being that powerful. Sure, a 100MHz 32 bit processor might seem powerful, but for less money you can buy some big and bold ARM9 or 11 that runs at 500MHz and comes with all the fancy features like memory management units etc. Dedicated silicon is still always faster and more economical. For that reason newer FPGA have dedicated multiplier blocks which can be faster then multipliers made from logic primitives.

The real power lies in being able to devise special function logic and taking advantage of parallelism and pipelining. Like a custom instruction to convert YUV<> RGB color spaces in one clock.

Really big FPGAs are expensive, a Stratix EP3SL340F1517C3NES is US$11.168 (eleven thousand and one hundred sixty eight) and you need to buy two of them at a time :D

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Large state of the art FPGAs have cost as much as a small car for as long as I can remember.

Of course, one isn't limited to single soft cores in an FPGA. It's quite easy to incorporate several of them, operating in parallel, which could make them very cost-effective in some applications.

Another interesting development is the XMOS architecture:

http://www.xmos.com

One of their markets is FPGA replacement. Similar, higher performance devices are available from Tilera and Pico.

Leon Heller G1HSM

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leon_heller wrote:

Another interesting development is the XMOS architecture:

http://www.xmos.com

One of their markets is FPGA replacement. Similar, higher performance devices are available from Tilera and Pico.

Leon do you own stocks in xmos ?

You mention xmos in 90% of your posts , so you are either really impressed or .....

/Bingo

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Because I like them a lot - low cost, very high performance (1600 32-bit MIPS from four cores), no bugs in the silicon, fantastic support, and lots of cheap development hardware. They really are the ideal solution for a lot of embedded applications. The only downside is the power consumption, but that compares favourably with FPGAs.

I also use AVRs, BTW, as well as PICs, ARMs, Propellers, and other devices. It depends on what is best for a particular application.

Leon Heller G1HSM

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XMOS is a reasonable solution. The cost is very reasonable, ~$7 for single core @ 400 MIPS that can run 8 threads.

4 cores @ $20, that is insane bang for the buck.

I would love to use XMOS myself, but nothing I do requires that kind of power.