when is loop_until_bit_is_set/clear required after setting a bit?

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I remember reading somewhere in avr libc docs to do e.g. this:

 

    PCIFR = _BV (some_bit)
    loop_until_bit_is_clear (PCIFR, some_bit);

 

This may be a bad example becuase of the odd write-one-to-clear
semantics.  That isn't the point here, I don't remember which
registers this advice applied to.  And I can't find it now.

The only thing I could find in the datasheet that related to this was
in section 13.2.4 of ATMega328P datasheet, where it says that you
have to wait a cycle after assigning an output pin value before
reading it back in.

 

Are there other cases where loop_until_* or a nop is required?

 

Maybe it's needed after setting some registers to make sure

the functionality specified by the assignment is actually in

effect?  If so, is this the same issue as the one mentioned in

13.2.4 and is a single nop therefore sufficient?

 

Thanks,
Britton

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No, you don't have to wait for a bit to set or clear. It's done during the instruction. In some peripherals, you set a bit to start something happening, and look at a bit to see if it's complete. Often you just loop on that status bit if you don't have something else you want to do while you're waiting.

 

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PCIFR are pin change interrupt flags and will be cleared as soon as you write 1 to the bit. There is no requirement to wait for this to occur so the author of that code presumably did not understand the AVR architecture fully.

 

About the only occasion I can think of where you might use suc a construct would be something like:

    ADCSRA |= _BV (ADSC)
    loop_until_bit_is_clear (ADCSRA, ADSC);

because the ADSC bit has the unusual behaviour that you set it to start an ADC conversion, it remains high while the conversion is being done and then it returns to 0 (clear) when the conversion is complete. So this would be a way to trigger and then wait for the completion of a conversion.

 

But this is a very unusual exception. You almost never need to wait for bits just set to take a certain state.

 

(about the only other example I can think of, though it may not even apply to AVR is that in some processors you set a bit to enable a PLL then you often want to wait for a while for the PLL to indicate it is in sync but whether that involves monitoring the same bit you just set or nowt I don't know).

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clawson wrote:
(about the only other example I can think of, though it may not even apply to AVR is that in some processors you set a bit to enable a PLL then you often want to wait for a while for the PLL to indicate it is in sync but whether that involves monitoring the same bit you just set or nowt I don't know).

 

It does apply to xmega devices. When setting up a clock in an xmega, one has to wait for the oscillators and the PLL to be stable before continuing with anything else, but one waits for a specific sync bit, not the enable bit, which is set immediately.

 

Other than that, I'd summarize what the people before me said as follows:

On an AVR, you only ever have to wait for a bit in a register to be set/cleared when using a peripheral that takes more than one cycle to complete an operation.

This bit will however not be the same bit one sets to start the operation, AVR have separate status bits for that purpose.

The peripheral in question can be pretty much everything, but a few examples would be USART, TWI, SPI, ADC, PLL, and so on.

How long an operation takes is stated in the datasheet, if its not a specific amount of cycles(eg PLL), the datasheet or an app note will say so.

Waiting can often be avoided by using interrupts or DMA for bulk data transfer.

 

Cheers,

Patrick

 

Edit: fixed some things to make it clearer and avoid misunderstandings.

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Last Edited: Thu. Sep 8, 2016 - 11:37 AM