Weakest reliable pull down?

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Hi all...

I'm trying to cheap out and make one I/O pin do too much. Situation normal so far. Anyway... I'm contemplating how weak of a pull-down I can get away with and still get a reliable zero on the input pin. Is 220K to ground too weak?

"But why?" sez you... well, in some situations the line is also pulled up, so I'm thinking of a 47K pull up which with 220K should give a reliable one. 267K/5V is a few uA of continuous drain in the pulled-up situation -- if it gets much larger than that I need a better sleep solution.

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The datasheet tells you what is considered a logic '0' and '1' voltage for the temperature range. Obey this and you're home free, ignore it and you might have trouble. So calc the voltage at the input and see if that is within the realm of what the datsheet says, otherwise alter resistance values until you comply.

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dbc wrote:
"But why?" sez you
Well, I'm still saying "but why". I'm not sure why have you a pull-up pin along with a pull-down pin and how you sum then to be 267K of resistance. However, as far as designing your pull up or pull down resistors, you need to look at the voltage measure at the pin being the result of a voltage divider between the output (or input) impedance of the pin along with the various resistive devices you have connected to the pin, along with the input leakage of the pin. Lastly, keep in mind that CMOS gates have sigificant capacitance so the more current the circuit connected to your pin can provide will more quickly change the voltage on the pin will change.

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If you want to have low currents because of sleep you could pull down the resistance via an Open drain output (it is included in your uC) and then pull up a schotky diode - BAS86 (Input pin-anode / Vcc-cathod). Maybe in this way you will have less energy loss when sleeping.

Michael.

Michael.

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OK, it's pretty clear I didn't explain myself well. I do know how to read a data sheet to find basic logic voltage levels and so forth. I've had 30 years or so of practice and sometimes even get it right :) Let me restate my question a little more clearly, since my original post was a little thin and apparently murky.

Even though I think there is a better solution anyway, I'll explain what I was initially trying to do:

1. Avoid a floating input at all times.
2. Be able to detect an unplugged device by sensing a reliable zero, hence the pull down.
3. Be able to detect an inserted device, hence a pull-up switched by the device socket.
4. Not have lots of current going through the two resistors in series when a device is inserted.
5. Turn around the I/O and drive the pin as a device select line.

So... now to the math. I'm making the assumption that a floating AVR input will not be a reliable zero. So, I need a pull-down. How weak can I get away with? I'm looking for practical experience that the datasheet doesn't speak to. I propose 220K.

To get a 1 when a device is inserted, we need to get above the logic 1 threshold. A 47K/220K voltage divider ought to do that. Continuous current drain through from power to ground when a device is inserted is the two resistors in series. Last time I checked, 47K+220K was 267K. 5V/267K is my wasted current. Also, 47K || 220K is a reasonable load to drive in the other direction.

Anyway, boiling it down to the fundamental question, it's a matter of "not floating" in a reliable way with a weak pull down.

As it turns out, after reading the peripheral device datasheet more carefully, it looks like it has another function that I can use instead.

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The data sheet for the MEGA16 says max input leakage current is 1uA, so I would think anything up to 500K ohm is safe.

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A quick read of the m32 datasheet tells me:

Vil = 0.2Vcc. @5V = 1V
And as Sefton states, Iil =1uA max.
Solve R = V/I = 1Mohm.
So anything lower than this and you're home free.

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The math is all right, but I would fear, the line with that high impedance will be very noise sensitiv.