Watchdog and ATTiny9 Simulator in AtmelStudio

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The ATTiny9 has few internal resources, so I am using the WDT as a 1 Second ISR and not a hardware Reset.  When i run my code on the simulator, I do not get ANY WDT Interrupts.  Is the WDT simulated in AtmelStudio, or am I wasting my time?

Its a single register to set up and I have set it to 0x46, and global interrupts are enabled.

0x46 =

WDIE = 1

WDE = 0

WDP = 0110 = 1 Second

 

SO, as far as I can tell I should get a WDT interrupt in the simulator once a second (when the program is continued, and not single stepped), but I get nothing.  Is there some setting to enable this that I cant find?

 

This is AtmelStudio 7 BTW (Latest Version)

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The WDT must be written to in a very specific way to enable the WDT, it is detailed in the DS. 

Show us the code you used to enable the WDT, and please use the "<>" code tags in the menu above to do that.

I don't remember if the simulator works correctly with the WDT, but I believe it does..... IIRC

After enabling WDT interrupts, do you also enable global interrupts?

Do you have a ISR for the WDT?

 

Jim

 

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Last Edited: Tue. Jul 18, 2017 - 02:02 PM
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strontiumdog wrote:
0x46 =

WDIE = 1

WDE = 0

WDP = 0110

what programming language is this? 0x46 cannot really be an "lvalue" can it (and no assigned value anyway) and is 0110 an OCTAL constant ?

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clawson wrote:
what programming language is this?

OP is showing the value of the watchdog control register, and then showing pertinent bit names and values.

 

ki0bk wrote:
Show us the code you used to enable the WDT, and please use the "<>" code tags in the menu above to do that.

+1.  Also toolchain and version.

 

I seem to recall another thread about brain-dead watchdog setup and GCC.

 

 

You can put lipstick on a pig, but it is still a pig.

I've never met a pig I didn't like, as long as you have some salt and pepper.

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strontiumdog wrote:
Is the WDT simulated in AtmelStudio, or am I wasting my time?

Also a possibility, at this point...

 

 

You can put lipstick on a pig, but it is still a pig.

I've never met a pig I didn't like, as long as you have some salt and pepper.

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Manual for simulator:

 

http://www.atmel.com/webdoc/simu...

 

Says that for some tiny the WDT period is 64 times too long. But that's not "brain dead" models in the list.

 

One thing to be wary of is that the sim runs like a 50kHz AVR. So if you are used to 1MHz..8MHz things run extremely slowly and I guess that probably means the WDT as well. So if you set a 1 second timeout in simulation it could be 20..50 times that for example.

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clawson, thanks for the link.  Its unclear from that if WDT is supported or not in the simulator, but if I can get past that problem, then working out stimulus files was my next challenge and that information is there, so thanks.

 

    ; Write signature for change enable of protected I/O register
    set_io      CCP, 0xD8                       ; Allow change of protected registers.
  9e:	08 ed       	ldi	r16, 0xD8	; 216
  a0:	0c bf       	out	0x3c, r16	; 60
    ; Within four instruction cycles, Configure Clock Prescaler.
    set_io      CLOCK_PSR, CLOCK_8MHZ           ; Set Clock Prescaler to 8Mhz (1Mhz is default)
  a2:	f6 bf       	out	0x36, r31	; 54
    ; Within four instruction cycles, Configure WDT
    set_io      WDTCSR, ((1<<WDIE) | 0x06)      ; Interrupts ONLY, AND 1 Second Interval.
  a4:	06 e4       	ldi	r16, 0x46	; 70
  a6:	01 bf       	out	0x31, r16	; 49
    wdr                                         ; Start Watchdog counting from 0.
  a8:	a8 95       	wdr

There is the code to initialise the watchdog, I am aware of the special write to the CCP to enable writes to protected registers which can only happen up to 4 cycles later, the WDTCSR is written 3 cycles after that. Interrupts are disabled during this initialisation, so no ISR can trigger during this time to upset the timing.

 

r31 is pre-initialised to 0x00 earlier in the code.

 

Apologies for not just putting the source code, but its a GCC Assembler program and I use both GAS macros and C Preprocessor statements extensively, so it wouldn't look like real assembler, and then I would have to explain why i wrote the macros like I have, etc etc.  The Dump above shows the actual assembled instructions with my code interspersed, the only thing that really matters are the CPU instructions.

 

I do call SEI later in the code, and then spin in a loop waiting for the Watchdog Timer tick.

 

    ; Lastly Enable Interrupts
    sei                                         ; Enable Interrupts after configuration
  fc:	78 94       	sei

000000fe <main>:
.global main
main:

    ; Wait until a ONE WIRE RESET is detected.
wait_for_bus_reset:
    rjmp        wait_for_bus_reset              ; Loop here, waiting for OW Comms Reset Pulse
  fe:	ff cf       	rjmp	.-2      	; 0xfe <main>

 

There is a Watchdog Timer ISR routine, AND I put breakpoints on every possible vector of the CPU while waiting for the Tick, and nothing ever triggers (including reset), and when I break its spinning on my loop.  I have waited for many minutes and never had the WDT trigger.  I have seen the Timer0 Counter monotonically increase and wrap in the simulator, so its not running too slowly. I have timed and I am getting approximately 271,585 simulated CPU cycles per second, so while not realtime, certainly fast enough for my debugging needs.  I have other possible sources of interrupt in my program, but they require stimulus on pins to trigger them or set them up and there is no stimulus yet, so the only possible IRQ source at the moment is the WDT.

 

The simulator shows the I bit in SREG set, specifically, SREG = 0x82 (I and Z) when spinning on my loop.  The loop is simply a rjmp to itself, there is no other processing so SREG is not changing at all while waiting.

 

I was really hoping for a good simulation of the ATTiny9 because it has no debug capability and such limited IO, that I don't have any available for debug status (and certainly no code space for anything more sophisticated than set a pin, clear a pin, in any event). 

Simulation seemed the only real way to test the code.  I have written the assembly code in such a way that i can rebuild the program and run it on a atmega328p which is very different, but is largely a peripheral superset of the attiny9.  However, I know that emulating on a different MCU is not ideal (remembering back to working with In-circuit emulators on MC68302). I may have little choice however, especially if one of my two timers is unavailable in the simulator.

 

The code is built with AtmelStudio 7.0.1417, so whatever version of the Simulator, GCC/GAS/LD, etc that is shipping with.

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strontiumdog wrote:
The code is built with AtmelStudio 7.0.1417, so whatever version of the Simulator, GCC/GAS/LD, etc that is shipping with.
So this is GAS (i.e. a .S) file not Atmel Asm 2 (the other assembler that comes with AS7) then?

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You could write a standalone blinky program to verify you have the WDT code working and test on a real T9, use the simulator for the other stuff. 

 

 

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I managed to get the Watchdog simulating.  The problem seems to be the Simulator doesn't default to the unprogrammed state of the chip regarding fuses.  Im not sure what it does default to, but i got it running after i added this:

 

    .section .config                ; Configuration Memory Section
    .byte     0xFE                  ; Configuration Byte
    
    .section .lock                  ; Lock Memory Section
    .byte      0xFF                 ; Lock Byte
    
    .section .signature             ; Signature Memory Section
    .byte       0x08
    .byte       0x90
    .byte       0x1E