a very strange problem with 32KHz Osc on UC3B

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hi,

I just found out that on my UC3B PCB with 16MHz crystal on OSC0 and 32KHz crystal on OSC32, if I set the CPU wroking frequency as 16MHz/256, as:

	//	/* Divide PBA clock by 256 from main clock.
	//	Pheripheral Bus A clock divisor enable = 1
	//	Pheripheral Bus A select = 7
	//	Pheripheral Bus B clock divisor enable = 1
	//	Pheripheral Bus B select = 7
	//	High Speed Bus clock divisor enable = 1
	//	High Speed Bus select = 7
	//	*/
		pm_cksel(pm, 1, 7, 1, 7, 1, 7);
	
	// Switch the main clock to the external oscillator 0
	pm_switch_to_osc0(&AVR32_PM, FOSC0, OSC0_STARTUP);

then later when I set TC1 waveform output 0.5Hz clock waveform on A1 pin with 32KHz OSC input:

// Options for waveform genration.
  tc_waveform_opt_t waveform_opt =
  {
    .channel  = TC_CHANNEL1,        // Channel selection.

    .bswtrg   = TC_EVT_EFFECT_NOOP,           // Software trigger effect on TIOB.
    .beevt    = TC_EVT_EFFECT_NOOP,           // External event effect on TIOB.
    .bcpc     = TC_EVT_EFFECT_NOOP,           // RC compare effect on TIOB.
    .bcpb     = TC_EVT_EFFECT_NOOP,           // RB compare effect on TIOB.

    .aswtrg   = TC_EVT_EFFECT_NOOP,           // Software trigger effect on TIOA.
    .aeevt    = TC_EVT_EFFECT_NOOP,           // External event effect on TIOA.
    .acpc     = TC_EVT_EFFECT_TOGGLE,         // RC compare effect on TIOA: toggle.
    .acpa     = TC_EVT_EFFECT_TOGGLE,         // RA compare effect on TIOA: toggle (other possibilities are none, set and clear).

    .wavsel   = TC_WAVEFORM_SEL_UP_MODE,      // Waveform selection: Up mode with automatic trigger on RC compare.
    .enetrg   = FALSE,                        // External event trigger enable.
    .eevt     = TC_EXT_EVENT_SEL_TIOB_INPUT,  // External event selection.
    .eevtedg  = TC_SEL_NO_EDGE,               // External event edge selection.
    .cpcdis   = FALSE,                        // Counter disable when RC compare.
    .cpcstop  = FALSE,                        // Counter clock stopped with RC compare.

    .burst    = TC_BURST_NOT_GATED,           // Burst signal selection.
    .clki     = TC_CLOCK_RISING_EDGE,         // Clock inversion.
    .tcclks   = TC_CLOCK_SOURCE_TC1           // Internal source clock 1, connected to 32KHz .
  };

  // Assign I/O to timer/counter channel pin & function.
  gpio_enable_module_pin(TC_CHANNEL1_A_PIN, TC_CHANNEL1_A_FUNCTION);

  // Initialize the timer/counter.
  tc_init_waveform(tc, &waveform_opt);  // Initialize the timer/counter waveform.

  // Set the compare triggers.
  tc_write_ra(tc, TC_CHANNEL1, 0x7FFF);     // Set RA value.
  tc_write_rc(tc, TC_CHANNEL1, 0xFFFF);     // Set RC value.

tc_start(tc, TC_CHANNEL1);

what i really get is not 0.5Hz anymore, it's about 2.3s period instead.

but if I set CPU as 16MHz/128:

pm_cksel(pm, 1, 6, 1, 6, 1, 6);

then the output waveform is correct!!!

Why???!!!

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anyone knows?

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It seems that there is a ratio value to respect, indeed 16Mhz/256 is lower than 2*32Khz BUT 16Mhz/128 is higher than 2*32Khz.

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what do you mean?