Usefulness of multiple serial peripherals of same type

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How can it be useful to have > 1 spi, TWI, etc. when the core can only do 1 thing at a time ?

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How can it be useful to have > 2 registers when the core can only handle no more than 2 registers at a time ?

Warning: Grumpy Old Chuff. Reading this post may severely damage your mental health.

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The core is faster than spi and twi etc! The usart, spi,twi etc operate in parallel with the 'core' and can interrupt when interaction is needed or your code can poll these devices o see when they need more data etc.

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minimum delay time for atmega32??

/Jakob Selbing

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Anybody have any concrete examples where they used > 1 of the same type ?

serial perip. in use ( can't use 2nd perip. )
1st perip. all done ( nice, let's use the 2nd 1... On second thought, why not use the 1st 1 again :D  )

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Last Edited: Thu. Dec 23, 2010 - 08:10 PM
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Curious question. One of the most common uses of multiple UARTs is where you have a GPS on one and a GSM on the other. Both may be spewing data at exactly the same time. The two UART modules each receive and buffer characters then, when a complete frame has been received, one, the other or both raise their RXC flags. Assuming interrupts are used the CPU in turn pulls the UDR from each and then leaves them to it to handle the reception of the next inbound character. If there was only one UART or none and they had to be emulated in software you could spend the majority of your CPU time doing just that. So of course it makes sense to hand off the task to hardware blocks just as you do with TWI, SPI, timers and so on.

You always trade silicon for CPU cycles. The more of the job that can be done autonomously in hardware the less work the CPU has to do and so the more time it has for actually "processing"

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Why is there more than one timer, then?

What AVR model(s) are you referring to in particular?

Until you get to the centipedes, there isn't much doubling-up.

[Now, the Xmegas and ARMs will have like a peripheral set on each port. Of course, the DMA is there as well.]

The modern AVRs can use USART as SPI-master, to cloud it even further.

One certainly might want a slew of TWI sensors, and the little ones might only have a single pin for address strapping.

In certain cases, one might not want all the SPI devices on the same bus.

A "concentrator" node might be a master and a slave.

Anyway, I've got a '640 app that is pretty much USART-used-up, even though there are four. One is module comms to remote modules. One is ModbusRTU to Anybus module and from there to the outside world. One is to FTDI->USB->PC. And one is to an RS232 device (industrial scale). I'd like to have another for RF remote sensors.

The native SPI has three devices on it, including an SD card.

Lee

You can put lipstick on a pig, but it is still a pig.

I've never met a pig I didn't like, as long as you have some salt and pepper.

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Each different peripheral can be active at once. e.g. UART1, UART0, SPI, TWI, ADC, Analog Comparator, Timer0, Timer1 ...

They each have an xxxxIF flag to signal when they are ready.
You can either use interrupts or simply poll the xxIF flag.

With TWI or SPI, you normally have several external devices on each bus.
You generally only have one external device active at a time.
The multiple UARTs on some AVRs can all function simultaneously.

The Xmega device have multiple TWI, SPI, USART. This is generally for the convenience of the pcb wiring. e.g. you would only use a single TWIx e.g. TWIC or TWID

David.

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I have used multiple USARTs on many occasions. There have been times when multiple TWI would have helped me greatly, but, AFAIK, the AVR I was using only had one.

Four legs good, two legs bad, three legs stable.

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indianajones11 wrote:
Anybody have any concrete examples where they used > 1 of the same type ?

I usually use more than 1 GPIO pin too.

But seriously.
Not many real-world examples on my behalf. One board used two UARTs, one for bluetooth module and one for RS232 to PC.

However at least on some occasions it would have been nice to have two SPIs or two TWI modules.

Why?

Sometimes an AVR is a slave to bigger CPU, while the AVR has to control some chips. If you have only one SPI, then you have to use that for being SPI slave, while you can use software SPI for controlling the chips. Same thing with TWI.

Actually I would be satisfied if the chip I am now using had like seven properly working TWI modules, but no, it has only two TWI modules which have hardware "features" that make them almost impossible to use for even simple TWI master comms without interrupts. The board has multiple TWI buses, one for being slave for another system, and then there are several master buses, which need to be separate, because they have different speeds (400kHz devices are on their own bus, 100kHz devices are on their own bus, and few other buses because who knows what TWI devices will be connected there and will it interfere with existing chips etc.

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Quote:
Why is there more than one timer, then?

Well those can run independent for a while before needing servicing.

Quote:
What AVR model(s) are you referring to in particular?
Just a general question, no 1 specific AVR .

thanks all

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Quote:

Well those can run independent for a while before needing servicing.

And the U(S)ART/SPI/TWI cannot?

(I outlined using four USART in an app. And no, without a mux I can't go from one to the other. But also, with the PC link and the Anybus link, I'm kind of the slave--I don't know when I'm going to see something.

Anyway, at a modest baud rate of 57600, that is about 5000 characters/second. 200us/character. It takes a few microseconds to service each. So even with a full-tilt-boogie data stream arriving/leaving, it is 90+% "idle" time between characters.)

Quote:

Just a general question, no 1 specific AVR .

And in general, how many AVR models have multiples of the peripherals you are thinking of?

You can put lipstick on a pig, but it is still a pig.

I've never met a pig I didn't like, as long as you have some salt and pepper.

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Quote:
And the U(S)ART/SPI/TWI cannot?

All constantly transceiving at same time w/o interrupting cpu... no.
Quote:
And in general, how many AVR models have multiples of the peripherals you are thinking of?

Xmegas.

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Quote:

All constantly transceiving at same time w/o interrupting cpu... no.

I guess you know best. Just' 'cause we have a current thread on timer servicing every <100us and a e.g. USART is longer than that--my logic must be way flawed.

Quote:

Quote:
And in general, how many AVR models have multiples of the peripherals you are thinking of?

Xmegas.


I swear there was a mention of "DMA" somewhere in this thread. It has either disappeared or this is further evidence of my senility. So now the question is really about Xmegas, which have DMA so >>don't<< need to interrupt every unit transfer.

I'm out.

Lee

You can put lipstick on a pig, but it is still a pig.

I've never met a pig I didn't like, as long as you have some salt and pepper.

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The Musical Instrument Digital Interface standard (MIDI) often makes use of two USARTs when a person is playing a keyboard along with a PC MIDI sequencer.

MIDI is similar to RS232 except it is 31.25K baud and works with a current-loop_optoisolator instead of +/-9V. If you mix the signal from the PC sequencer and piano keyboard using a simple two-input AND gate then it will happen that bytes can arrive from both sources at the same time and collide. This results in stuck notes and random patch changes, which is what you really don't want when performing for 50,000 people at Madison Square Garden.

MIDI information comes in messages of two or three bytes per message. A MIDI merger uses an AVR with two USARTs to get bytes from each source; each source (the sequencer and the piano keyboard) having its own USART. Each byte is stored in a message buffer until the entire message is received. Then, if the output USART is not busy transmitting a previous message, each message is retransmitted as a two or three byte string. A six-note chord played on the piano coupled with bass/drums/strings notes arriving at the same time from the sequencer can generate a lot of messages at nearly the same time. Each buffer should be a few hundred bytes in size.

I have uploaded a MIDI merge project using a Mega644P to the projects section here. It seems to work which means that I'm either a decent programmer or am not creative enough to make it fail. Feel free to download it, analyze it, make it fail, make it better, use it, abuse it, whatever. Please do let me know if you can make it fail and can determine how to make it work better.

There are actually two MIDI mergers in the Projects section. Mine seems to work a little better because it buffers both the input and the output.

So, yes, there are real-world applications requiring AVRs with two simultaneous USARTs and interrupt-based interfacing.

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indianajones11 wrote:
Anybody have any concrete examples where they used > 1 of the same type ?

No problem.
E.g. I use the ATmega2560 with all four UARTs:
UART0: SPI-keyboard/LEDs (some 74HC165/74HC565)
UART1: GLCD
UART2: SPI-ADC/DAC
UART3: RS-232 Remote interface

All these are used as interrupts in background, so all these works at the same time in parallel.

Peter

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How about an autonomous vehicle controller? 4 uart avr like mega1280 is a master controller, and it could use a uart to receive gps data, another to control motors, another to do telemetry to an xbee back to the carbon based observers, and the last one to jack the tether in for mission data upload?

Imagecraft compiler user