Use of TWI on ATmega4809 Xplained Pro?

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This is closely related to the recent post Default F_CPU for "ATmega4809 Xplained Pro"?https://www.avrfreaks.net/forum/default-fcpu-atmega4809-xplained-pro

But, this is a totally separate issue, hence the new thread.

 

The Xplained Pro documentation says that TWI is mapped to PORTC[3:2] AND it says that it is shared with mikroBUS, CryptoAuthentication, and EDBG DGI. 

 

Does  that mean that TWI should remain on PORTC rather than PORTA and that the settings such as baud rate remain unchanged? How do you insure that you don't try to initiate a transfer that conflicts with something else that is going on? OR, do these shared uses only occupy the slave capability while the master remains  at PORTA[3:2] (which the Xplained Pro header documentation never mentions)?

 

At this point, the confusion level is about 12 on a scale of 1 to 10.

 

Thanks

Jim

 

 

 

 

Until Black Lives Matter, we do not have "All Lives Matter"!

 

 

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The master can be on PortC3:2 or PortA3:2.  Theres no issue there.

 

ka7ehk wrote:
How do you insure that you don't try to initiate a transfer that conflicts with something else that is going on?

I would think that the hardware would handle that.  Based on the little bit of reading I have done it does report teh Bus State, so your code can check.  I would assume you would only need to do this on a mult-master setup, but on a single master/many slave you should be fine

 

ka7ehk wrote:
do these shared uses only occupy the slave capability while the master remains  at PORTA[3:2] (which the Xplained Pro header documentation never mentions)?

 

You can enable both master and slave capabilities and they can both occupy the same pins.  <caveat> I am getting this info from setting up a project in Codevision Wizard and its not barking at the setup.

 

Right Side Jim

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Is there a crypto chip on your board?

 

 

If so, it is... hmmm. Whatever it is, you can't use that alternate to get to it, but other than that, I would think I2C functions should swap to the alternate pins without issue. On an AVR-DA thing, I was looking at you can split the slave and master functions, so the alternat pins can have the slave function while the default pins have the master function (crazy stuff).

 

 

http://ww1.microchip.com/downloads/en/DeviceDoc/ATmega4809_Xplained_Pro_Schematics.pdf

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What I am not understanding here are the master/slave assignments, and the alternate uses. I see several possibilities:

 

1. It COULD be operating with the master assigned to PC2 and PC3, and nothing happens on that port until you run it as part of your program (but only because there is no microBUS activity, and no CryptoAuthentication and no EDBG activity).

 

2. It COULD be operating with the master assigned to PC2 and PC3, with EDBG activity. Does not make much sense because I would expect the EDBG master to be elsewhere, which would require this port to be the slave. If this (master with EDBG activity) WERE the case, then you would have to interleave your activity with the EDBG activity and you (probably) could not change the baud rate.

 

3. It COULD be operating as a slave on PC2 and PC3 in the role of an EDBG client, and the master running on PA2 and PA3, free to arbitrarily use.

 

I have no clue which, if any, is the scenario that actually happens. My hunch is case #1, simply because there is no reference in the documentation with respect to TWI and PORTA[3:2]. But, I am concerned about messing up EDBG, knowing almost nothing about it, and basically bricking a board that I am depending on.

 

Jim

 

 

Until Black Lives Matter, we do not have "All Lives Matter"!

 

 

Last Edited: Sat. Feb 15, 2020 - 01:27 AM
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ka7ehk wrote:
... and basically bricking a board that I am depending on.
Shouldn't be able to brick as :

  • megaAVR 0-series UPDI isn't multiplexed
  • EDBG MCU is the same as in an Atmel-ICE
  • UPDI controller has access to NVMCTRL (fuses)
  • EDBG can reset the mega4809

 

 

"Dare to be naïve." - Buckminster Fuller

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Oh I see now

 

 

spam

 

 

more spam

 

 

even more spam

 

 

ran out of spam

 

 

what a Rube Goldberg contraption.

 

update: I guess either (4809 or EDBG) could run master or slave or multi-master, this was painful.

Last Edited: Sat. Feb 15, 2020 - 02:39 AM
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Thank you, the ones at Microchip, for the level converters (ATmega324PB Xplained Pro is 3.3V only, mega4809 is a follow-on to mega324PB)

 

"Dare to be naïve." - Buckminster Fuller

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I wonder if it would be reliable as a multi-master? Would the two-state machines cause a war and hang themselves. Perhaps if they don't share the same pin hardware, it might be more reliable?

Last Edited: Sat. Feb 15, 2020 - 02:34 AM
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>The Xplained Pro documentation says that TWI is mapped to PORTC[3:2] AND it says that it is shared with mikroBUS, CryptoAuthentication, and EDBG DGI. 

 

And none of those will be used so you have the twi0 all to yourself. I don't use atmel studio but I would be surprised if they turned on any edbg dgi functionality without you telling it to do so. The worst case scenario is they always have it enabled, but since it is a slave only you just simply never address it. It also does not appear the alternate pins are used for anything special so could also be used (you providing the pullups). The advantage to using the pc2/3 pins, is they already have the pullups.

 

 

 

This is the edbg user guide link they provide on the xplained page-

http://ww1.microchip.com/downloads/en/DeviceDoc/Atmel-42096-Microcontrollers-Embedded-Debugger_User-Guide.pdf

 

The two-wire interface is set to slave mode, meaning that communication must be initiated by a target device in master mode. The interface must be enabled from the PC before communication can begin. The slave address of the I2C interface can be configured, but is default set to 0x28

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Ahh, curtvm, did not think to look in the EDBG doc. That lays it out pretty clearly. I think that I will try TWI master on PORTA[3:2] for starters.

 

I don't think this style of problem is unique to Xplained Pro. Arduino boards are full of constrained pins, for example.

 

Thanks

Jim

 

Until Black Lives Matter, we do not have "All Lives Matter"!

 

 

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Follow-up...

 

I just checked the registers on my ATmega4809 Xplained Pro. This is a "TWI virgin", and has never had anything written to any registers that have to do with TWI.

 

I fully expected the USB interface chip to have configured it for EDBG use. Not so. ALL pins associated with both master and slave TWI are still inputs. None of the TWI registers are anything other than zero (which is default for all). Even PORTMUX.TWISPIROUREA[3:2] is 0b00, which is no real suprise because it is both the default value and the value that fits the previous discussion for master and slave pin assignments. 

 

Conclusion: barring some explicit use of EDBG, go ahead and use both the master and the slave.

 

Jim

 

Until Black Lives Matter, we do not have "All Lives Matter"!