Hi,
I'm using a SPI and a I2C slave connected to an ATtiny202 so I need to share the GPIOs for I2C and SPI and it is working however I can't understand why do I need to disable I2C before use SPI but it is ok to let SPI enable before use I2C.
The first image show a I2C communication followed by a try to do a SPI communication without disable I2C.
This image show the same chunk of time however in this case before try to do a SPI communication I disable the I2C peripheral.
I have other parts of the code where the SPI communication is done before I2C and in this case I don't need to disable SPI to get a working I2C communication.
Channel 1 (yellow): SPI_CS
Channel 2 (Cyan): SPI_MOSI/SDA
Channel 3 (Pink): SPI_MISO/SCL
Channel 4 (Blue): SPI_CLOCK
Reading the datasheet it says the following about SPI:
This is my SPI and I2C init and deinit code:
void SPI0_init(void) { PORTA.PIN1CTRL = 0; PORTA.PIN2CTRL = 0; PORTA.PIN3CTRL = 0; PORTA.PIN6CTRL = 0; PORTA.DIR |= PIN1_bm; /* Set MOSI pin direction to output */ PORTA.DIR &= ~PIN2_bm; /* Set MISO pin direction to input */ PORTA.DIR |= PIN3_bm; /* Set SCK pin direction to output */ PORTA.DIR |= PIN6_bm; /* Set SS pin direction to output */ PORTA.OUT &= ~PIN1_bm; PORTA.OUT &= ~PIN2_bm; SPI0_slave_deselect(); SPI0.CTRLB = SPI_BUFEN_bm; /* Buffer Mode Enable */ SPI0.CTRLA = SPI_CLK2X_bm /* Enable double-speed */ | SPI_ENABLE_bm /* Enable module */ | SPI_MASTER_bm /* SPI module in Master mode */ | SPI_PRESC_DIV4_gc; /* System Clock divided by 16 */ } void SPI0_deinit(void) { SPI0.CTRLA &= ~SPI_ENABLE_bm; /* Disable module */ } void i2c_init() { PORTA.DIR &= ~PIN1_bm; PORTA.DIR &= ~PIN2_bm; uint32_t baud = 4;//((F_CPU / I2C_FREQUENCY) - //(((F_CPU * I2C_T_RISE) / 1000) / 1000) / 1000 - 10) / //2; TWI0.MBAUD = (uint8_t)baud; TWI0.MCTRLA = TWI_ENABLE_bm; // Enable as master, no interrupts TWI0.MSTATUS = TWI_BUSSTATE_IDLE_gc; } void i2c_deinit() { //while (!(TWI0.MSTATUS & TWI_WIF_bm) && !(TWI0.MSTATUS & TWI_RIF_bm)) { //}; // Wait for write interrupt flag TWI0.MCTRLA &= ~TWI_ENABLE_bm; // Enable as master, no interrupts }
Can you suggest why this is happens?