USART doesn't work while using PWM (dc motor control)

Go To Last Post
73 posts / 0 new

Pages

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

this is my scope point and two CH wave

 

EDIT:

i changed my scope gnd pins, and double checked GND lines all together.

 

but still gnd don't change..

Attachment(s): 

Last Edited: Mon. Aug 2, 2021 - 07:27 AM
  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

50.jpeg yellow channel 1, it is a typical AC (and not DC) waveform. Do you have AC/DC switch on the probe, perhaps.

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

my scope like this.

(scope_info.jpg)

 

and this is my setup

(setup.jpg)

Attachment(s): 

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

As avrcandies in #48 said, the voltage can not be negative.
Neither it can be AC-looking ie. negative a lot.
What is wrong, we can not determine without your help. Use another scope, perhaps.

 

Last Edited: Mon. Aug 2, 2021 - 10:10 AM
  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

is there any possible that my oscilloscope is damaged?

 

my power strip Desktop, Light(LED), Oscilloscope, Power Supply,..

 

actually i turn off the Light tnan osciiloscope doesn't shaking.

 

 

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

 

grohote wrote:
Do you have AC/DC switch on the probe, perhaps.

 

Or setting in the scope like this :-

 

 

“Everyone knows that debugging is twice as hard as writing a program in the first place. So if you're as clever as you can be when you write it, how will you ever debug it?” - Brian W. Kernighan

Last Edited: Mon. Aug 2, 2021 - 10:55 AM
  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

#54

 

there is coupling setting, i changed that setting AC, DC but same...

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

Yes, the probe is good at FET G & S

However, I have asked several times & you didn't say..HOW EXACTLY is the avr grounded??  You need to show that explicitly.

 

If the AVR GND is tied to source the it is not possible to generate a negative voltage (with respect to either the gnd/source/AVRgnd)

 

Show exactly (the planes/traces) where the AVR GNS ties to the source & power gnd.  Are ALL avr pins solid to gnd?  

 

If it was AC coupling it would probably center around the avg level, rather than just going a little negative

You may  have gnd issues--that explains a lot.

When in the dark remember-the future looks brighter than ever.   I look forward to being able to predict the future!

Last Edited: Mon. Aug 2, 2021 - 11:32 AM
  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

i'm sorry i tried to explain my gnd lines. but i guess it was not enough because i'm just beginner so, i can't fully understand what you mean.

 

my PCB is like this (PCB_1.png, PCB_2.png)

 

it is two layer and both are GND plane.

 

because it is GND plane there is no trance GND, just all PCB pannel is GND.

 

of course FET's source is GND too. AVR GND too and they connected by GND plane.

 

below the pcb ellipse shaped GND1 is main GND pin. by soldeling wire.

 

i connected my scope to GND1 & GND3 & GND2, and i got same result.

Attachment(s): 

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

KimJiHoon wrote:
it is two layer and both are GND plane.

Next time on two layer boards, Route components, signals and power paths on layer 1 and ground return on layer 2. Since you are a beginner, this will make debugging a lot easier.

 

For now, I think this is a board design issue. Not sure though.

“Everyone knows that debugging is twice as hard as writing a program in the first place. So if you're as clever as you can be when you write it, how will you ever debug it?” - Brian W. Kernighan

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

Heisen wrote:

KimJiHoon wrote:
it is two layer and both are GND plane.

Next time on two layer boards, Route components, signals and power paths on layer 1 and ground return on layer 2. Since you are a beginner, this will make debugging a lot easier.

 

For now, I think this is a board design issue. Not sure though.

 

thank you for your reply

 

than

 

bottom layer -> gnd plane

 

top layer -> power plane

 

signal -> trace

 

is this right?

 

i don't have any clue with EMC or EMI design.

 

i designed gnd plane both of PCB's layer because my pcb is low speed and very simple.

 

and i read some tips

 

"if you don't know how, (two layer and simple) make gnd plane"

 

EDIT:

 

it is very embarrassing. my PCB is designed like Multipoint....

(PCB_guide.png)

 

Attachment(s): 

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

bottom layer -> gnd plane

 

top layer -> power plane  Power paths, signal tracks and almost everything.

 

KimJiHoon wrote:
i designed gnd plane both of PCB's layer because my pcb is low speed and very simple.

Not really a reason for GND plane on both layers. Being slow speed has nothing to do with it.

 

KimJiHoon wrote:
i don't have any clue with EMC or EMI design.

If you have no clue, then you probably don't have to worry about it.

 

KimJiHoon wrote:

and i read some tips

 

"if you don't know how, (two layer and simple) make gnd plane"

Again, 2 layer board. 1 layer dedicated to GND plane. You don't really have to have a Power plane, power paths/tracks/traces are fine on top layer. 

 

 

“Everyone knows that debugging is twice as hard as writing a program in the first place. So if you're as clever as you can be when you write it, how will you ever debug it?” - Brian W. Kernighan

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

It may be my tired old eyes, but it appears that pin 21 is not connected to GND. It looks like it connects to a via that is in an isolated area of the plane. At least, I do not see it connected to any of the main GND plane.

 

Again, it may just be my eyes not seeing the connection...

David

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

really thank you it's very helpful!

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

frog_jr wrote:

It may be my tired old eyes, but it appears that pin 21 is not connected to GND. It looks like it connects to a via that is in an isolated area of the plane. At least, I do not see it connected to any of the main GND plane.

 

Again, it may just be my eyes not seeing the connection...

 

you mean this pin?

 

via is connected to GND (bottom and top layer are both gnd plane).

 

#60 PCB_2.png

 

i think gerber img is miss captured. it's my fault your right (top layer display off gnd)

 

thank you for your reply!!

Attachment(s): 

Last Edited: Mon. Aug 2, 2021 - 04:08 PM
  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

KimJiHoon wrote:
bottom and top layer are both gnd plane

How many GND through- connection you have. The most important one should be at the Source /but, I can not see it/.

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

sorry i don't know what that mean

 

is these files helpful?

Attachment(s): 

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

 

The gnd plane looks rather awful...why put the parts where there is no clear path from the gnd  connection to the source?????  That is rather foolish when you could move the fet & diode and have a WIDE and DIRECT path?  Next time, takea good look at the layout?

 

Trace out with a marker and show how each GND pin on the AVR can get to the GND through the most direct path you can draw...it can't be seen from what you posted.  

If you can't draw a path, it does not exist

 

 

 

When in the dark remember-the future looks brighter than ever.   I look forward to being able to predict the future!

Last Edited: Mon. Aug 2, 2021 - 05:04 PM
  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0


Next time keep your gnd pane on the bottom, it will come out much better.  A PLANE is a solid, WIDE connection.  A little via between two layers DOES NOT CREATE A PLANE.

When in the dark remember-the future looks brighter than ever.   I look forward to being able to predict the future!

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

this is my new circuit

 

POWER & GND lines are okay?

 

new_circuit_1.png

left BAT_VCC is for relay COM & NO pin, i draw not a line it's area

 

 

new_circuit_2.png

my fet lines

 

new_circuit_3.png

GND & POWER lines for MCU

Attachment(s): 

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

 

 

 

Why do so many things look crooked...a lot of cleanup is needed...all over.  Also why not have your isp connector closer to the avr??...then you don't slice up the gnd plane as much.  Work hard to make that happen.

 

 

 

watch you don't connect two large pipes together with a small hole (I can't tell the sizes you are using)

 

help!   leave pads looking like pads.   Try to have one trace going to a pad, sometimes two if hard to avoid, but never 3

 

why is this cap not spund 180 deg?   keep looking at everything

spin these relays 180  & maybe avoid many of the crossovers...keep your eyes open for opportunity

??

Each time you will get better.  After you throw it in the trashcan & repeat you will see many improvements each time.

You have to practice, practice, practice to play good golf, same with PCB. Then you get a free t-shirt.

 

 

 

When in the dark remember-the future looks brighter than ever.   I look forward to being able to predict the future!

Last Edited: Tue. Aug 3, 2021 - 07:53 AM
  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

Also the crystal caps should come after the crystal, No?

Right now it's in-between the MCU pins and the crystal.

 

 

“Everyone knows that debugging is twice as hard as writing a program in the first place. So if you're as clever as you can be when you write it, how will you ever debug it?” - Brian W. Kernighan

Last Edited: Tue. Aug 3, 2021 - 08:03 AM

Pages