USART configured as SPI Slave with DMA

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I would like to know if anyone else has had success using the USART on a SAME70 in SPI slave mode with DMA?

 

I couldn't find any drivers in ASF4 for this, so I've rolled my own and I've hit an issue. When transmitting multi-byte messages some of the bytes are being corrupted. More specifically, it's a 4 byte message transmitted in one block (slave pulls SS low then toggles SCLK 32 times without any pauses between bytes). My SPI slave should be sending back {0x01,0x02,0x03,0x04} every time it receives the message from the master. Sometimes it gets it right. But quite often it sends {0x01,0x82,0x03,0x04} or {0x01,0x02,0x03,0x84}. The pattern I'm picking up is that the first bit of a byte is sometimes being flipped from 0 to 1 if the last bit of the preceding byte was 1.

 

The transmit buffer looks fine in memory (I've checked with a debugger, both before and after the data is sent). So I believe the issue is happening in the either the DMA transfer or the configuration of the USART.

 

I would be interested to hear if anyone else has encountered similar issues, or alternatively if anyone has been successful in using the USART as a SPI slave?

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I came across this in the errata;

 

Byte and Half-Word Accesses

If XDMAC is used to transfer 8-bit or 16-bit data in Fixed Source Address mode or Fixed Destination Address mode, source and destination addresses are incremented by 8-bit or 16-bit.

Workaround: The user can resolve this issue by setting the source addressing mode to use microblock and data striding with microblock stride set to 0 and data stride set to -1.

 

Could this be related to the bug I'm seeing? The ASF DMA drivers do implement the workaround, but I haven't delved deep enough into the operation of the DMA to understand if this workaround will have any limitations.

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Hi,

have you solved the issue?  Im having similar problem, Im doing SPI master (via SPI peripheral) transfer via DMA. In most cases it is working fine, but when the system is heavy loaded the some time the DMA finishes but RX buffer is full of default pattern (Im doing RX buffer memset before SPI transaction).  I really dont where to find an error.