Unstable SPI / SDCARD interface

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Hi

I have been struggling with a problem related to unstable SPI / SDCARD interface lately and have gone into coma trying to figure it out my self and now turn to you guys to have some new inputs to deal with

The card I have in hand is a prototype where main voltage is 5V, but where MOSI, SCK and CS (for sdcard) is "resistor level converted" (i.e. a simple resistor divider) to 3V to match level, MISO is connected directly to upro MISO without any resistors in between, and VCC for SDcard is 3V from regulator.

Code I use to test with for now has been working fine on another board which is running on 3.3V meaning no "level converters" is used on that board. I use the same SDCARD on both.

Case is that a simple "read as many blocks as possible" application may not read more than 30 to 4-500 blocks before it stops. If running with studio I can break and then i find my code waiting for tx completion (the while loop). I also see that the master bit (MSTR) has been cleared from SPCR but I have found no meaningful reason for why that happens.

I have inserted my Spi function below. If you have been having such trouble as this before, please do not hesitate or give possible solutions for my problem

signed int Spi(unsigned char Data)
{
    SPSR = 0;
    SPCR = SPE | MSTR | SPI_CLK_RATE | SPI_DATA_ORDER;

  SPDR = Data;
  while(!(SPSR & SPIF));     // Wait for tx complete

  return SPDR;
}

Regards
Vidar (Z)

----------------------------------------------------------

"The fool wonders, the wise man asks"

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Quote:

I also see that the master bit (MSTR) has been cleared from SPCR but I have found no meaningful reason for why that happens.

What about the obvious reason: How is the AVR's /SS pin configured? [You had better reply "as an output". Another acceptable answer is "Nothing connected, input, and internal pullup on". Unacceptable: "Floating input" and "Other input that chan change state".]

Lee

You can put lipstick on a pig, but it is still a pig.

I've never met a pig I didn't like, as long as you have some salt and pepper.

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Unless you've done something "clever" with SPE and MSTR I bet:

    SPCR = SPE | MSTR | SPI_CLK_RATE | SPI_DATA_ORDER;

is supposed to be at least:

    SPCR = (1<<SPE) | (1<<MSTR) | SPI_CLK_RATE | SPI_DATA_ORDER;

Obviously we don't know how you have SPI_CLK_RATE and SPI_DATA_ORDER are defined.

Cliff

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Sorry for my late response...

Call it clever or not my friend but I don't have register bits defined from 1 to 7 , but 0x01, 0x02, 0x04... This has been the most convenient way for me through the years.

Sorry that I did not show the definition for SPI_CLK_RATE and SPI_DATA_ORDER

#define SPI_MSB_FIRST             0
#define SPI_LSB_FIRST             DORD
#define SPI_DATA_ORDER            SPI_MSB_FIRST

#define SPI_CLK_DIV_4             0
#define SPI_CLK_DIV_16            SPR0
#define SPI_CLK_DIV_64            SPR1
#define SPI_CLK_DIV_128           (SPR0 | SPR1)
#define SPI_CLK_RATE              SPI_CLK_DIV_128

/SS is an output, yes, and it is used to enable a radio device. However that device is not mounted.

However, the board itself is like a ratsnest beeing a proto, so prob. there is some shortcuts or floating ends or unsteady connections. I better throw it away and build a new PCB with corrections added.

Regards
Vidar (Z)

----------------------------------------------------------

"The fool wonders, the wise man asks"