Maybe someone can help or have a solution for my current problem,
I have a prototype PCB with one ATmega128 & two ATmega8s.
They are connected to eachother with I2C/TWI.
With this prototype I planned to make a TWI library for multi-processor communication in the multi-master mode. This I have done before with philips chips like (80c552), the TWI module of the ATmega is actually have the same kind of state machine so I tought this would be not that difficult...
But my experience is that the ATmega's are working unstable at their TWI port.
This unstable behaviour only appears (often) if I use more than two devices (in multi master) with an high bus-occupation.
First of all I have checked a lot on the forum and verified this in my code:
1) no '&=' or '|=' used in the ISR to prevent early acknowledge of TWINT
2) Made the STOP-status (0xA0) as short as possible to prevent the TWI-hardware holding while a new start is on the bus (the ISR for 0xA0 is now 1.2 uS).
3) disable/enable 'restarts'.
4) lower the baudrate using TWSR
5) lower the baudrate using TWBR, TWBR always was higher then 10 like specified.
But nothing seems to help.
Finally I decided to work at 80kHz, which is 20% below 100kHz to ensure the "buss free time is 4.7 uS". Because I doubted this free time....
- My question is: How can de TWI decide if its <100kHz or >100kHz ?
(I'm using Xtal: 14.7456 Mhz because UART speed)
Finally I started to make a 'stop' detection with an external IC (4013, a FLIPFLOP).
When I trigger on the detection output and look at my scope it shows curious things...
Tbuf = "Buss free time" specified by philips at 4.7 uS for lower than 100kHz and 1.3 uS for higher then 100kHz. ATMEL did also specify these numbers in their TWI (ATmega) datasheets. But on my scope I can see this buss free time sometime is as short as:
700nS !! :(
My ISR will never be able to be that short i guess...
What I see is that somtimes after such short free time an other device generates a illegal start... (In a high clock cycle when data is high...)
This generates in the other devices a state: 0x00 (buss error) or 0x08 (Start) or 0x10 (repeated start for the master device at that moment).
After this situation the bus FREEZES (SDA low, SCL High), and I have the toggle TWEN on all devices or use reset before the system is up and running again....
I hope someone knows a solution or can confirm this problems. Is these problems are not easy to solve I guess I cannot use ATMEL chips in my applications... but It would be strange if they do not work conform the Specifications !