I can communicate with a ATmega644 as slave on I2C and it works well on low speed. But if I try a clock frequency of more than 50KHz, I see some very strange effects:
- The first byte of two bytes sent to the slave is being ACK-ed, but its value is right-shifted. (I miss the first bit, e.g. if I send a 0x04, I receive 0x02.)
- Sometimes I don't get an ACK for the second byte.
I think both strange effects are due to the fact that apparently the clock stretching mechanism does not work. I can clearly see on the oscilloscope when the AVR pulls down the SDA line, but the clock line is never pulled low by the client.
If I delay writing a '1' to the TWINT bit after being addressed, then I expect a delay on the clock line. But this does not happen.
I have tried to set the lowest to bits of the PORT C Data Direction Register to 1 but this did not change anything. Is there a special register to configure clock stretching?
My Initialisation code is:
#define TWCR_ENABLE ((1<<TWIE)|(1<<TWEN)) #define TWCR_TWEA ((1<<TWEA)) #define TWCR_TWINT ((1<<TWINT)) TWAR = DEFAULT_I2C_ADDRESS << 1; TWDR = 0xFF; TWCR = TWCR_ENABLE | TWCR_TWINT; sei(); TWCR = TWCR_ENABLE | TWCR_TWEA;