Hi all, I have the following questions on TWI .
1) I would like to confirm that my understanding of the datasheet (specifically Mega88) is correct. From my reading it seems that using the TWI hardware in master mode - that there is no interrupt and no status in the TWSR register after sending a TWI stop condition. This belief is confirmed by the fact that the TWSTO bit is the only one in the TWCR register that clears itself. For instance TWSTA has to be cleared manually.
2) Following from point 1 above. Because there is no interrupt after a stop condition on TWI, it would seem that the procedure to address a number of TWI slaves from the master in sequence, is the use a repeated start after addressing a slave. Using a new slave address to address the next slave. If one is implementing a totally interrupt driven driver for the master - using repeated start seems to be the mechanism to use, for streaming packets on the TWI bus?