I constructed (what should be) an auto-selecting voltage OR current limiter using a two comparators and a fet driver that has an internal AND gate. The fet drives the field of an automotive alternator. Two potentiometers are used to set the voltage at the non-inverting inputs, and then the inverting inputs are connected to the alternator output and a current shunt. Voltage dividers are used to get the proper voltage levels.
I have attached a schematic I drew in LTSpice. I did not show the power/ground for the chips or the decoupling caps that are across each chip. As it sets on the bench, running on battery, it has extreme internal noise and instability. I assume that the output switching is causing the sensed input state to switch as well. Adding some positive feedback hysteresis to (one of) the comparator/s helped, but did not fix the noise. The noise is only going to get worse when the engine is running and the alternator/s are outputing DC with 400+ Hz ripple plus whatever HF junk couples onto our signal lines from the ignition. Furthermore, the amp shunt is only dropping 1 mV per amp. At 400-500 amps that is a lot of power lost, and not much signal. Never mind the 60Hz sine wave that's ever present on everything.
The fet driver does have an AND gate, and two hysteresis' but I am treating the the input and enable as if they are equivalent; perhaps they are not. (See pp. 2) My circuit seems to work better (but still not correctly) if I have ONLY the voltage OR current limiter connected to the INPUT, and leave the enable pulled up.
I've been fighting with this for several days now. I do not consider myself as giving up, but rather that I have been beaten. Maybe I just want to cut my losses and find plan B. I have other ideas of how I might go about eliminating the dual comparator; maybe something involving several BJT's that I have not quite yet figured out in my mind. Maybe I'm missing something important with what I have.
Thank you for your time and consideration.