TOSC and XTAL pins on xmega D3 and A3 devices

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#1
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Just posting this as a warning to others to check where the TOSC pins are on their device before laying out the PCB!

 

The errata for the xmega D3 devices shows that for older rev chips one of the non available functions and options is 'TOSC alternate pin locations, and TOSCSEL bit in FUSEBYTE2'. Those non available items completely disappear in the latest rev chips, leading me to believe that this was now an available option. It seems, however, that the TOSC and XTAL pins are not shared and are instead on dedicated pins, TOSC steals 2 other digital I/O pins PE6 and PE7.

 

Upshot is D3 (and A3) devices have dedicated pins for XTAL and TOSC, D4 devices have shared pins with the option to place TOSC on different pins via the fuse. Check the TOSC placement in the pinout section and don't, like me' assume a D3 is the same as D4 :-(

 

Mark.

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Is this a bug in the datasheets? It does sound like it from what you say.

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No error in the datasheets I think, it was just a little unclear as they stated in early rev errata that the features were not available, then removed that errata in the latest rev. This is not wrong as such as the features didn't exist to start with, but a bit confusing. If I had read the pinout it would have been clearer.

Mark.

Edit: Well I've sort of changed my mind on this, errata are supposed to be for features that exist but don't work. So it's not an errata to say the TOSC/XTAL fusebyte doesn't work if the feature doesn't exist. It is possible it was supposed to work for early rev chips and so was an errata for them, then they changed the chip by removing the feature and so the later rev chips don't have the errata, but you'd expect to see changes in the rev history on the datasheet if that was the case. Any way you look at it it's confusing.

Last Edited: Wed. Jun 1, 2016 - 09:20 PM