TINY261 ADC Missing codes......

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Hi, I am using an ATTINY261 and I have a peculiar problem with the ADC.

I have set a VRef of 4.096 and 1.024(ish) to 1.1(ish) all have the same 0x0FF reading (10 bit range) out of this voltage range it behaves as it should, it is both linear and accurate. I have tried 2 chips and both the same, although same batch code I would lean toward me not doing something right!

Does anyone have any ideas?

Thanks.

John.

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I don't have any apps with this model, but have many many production AVR ADC apps and have never seen missing codes.

Show the fragment of where you obtain your results. I suspect you may be reading ADCL/ADCH in the incorrect order.

[also, test at the rollover of 0x1ff to see if it demonstrates the same symptoms.]

Lee

You can put lipstick on a pig, but it is still a pig.

I've never met a pig I didn't like, as long as you have some salt and pepper.

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Here have a look... I tried and it only happens at 0x0FF!

I'm using the AVR dragon in simulator mode and can see the contents of the ADC registers when i set the break point to just after the conversion is detected.

**

RD_ADC_AVE:
clr r0
clr r1
ori r17,$40 ;select EXT REF, right adjust ADLR and channel stored in r17
out ADMUX,r17
ldi r17,$80 ;ADC Enable
out ADCSRA,r17

ldi r17,4
LP_GET_ADC:
sbi ADCSRA,ADSC ;start convert
WAIT_RD_AVE: ;<------------------ should change this to sleep really to get better ADC performance
sbic ADCSRA,ADSC ;wait for conversion to finish
rjmp WAIT_RD_AVE;

in r16,ADCL ;add 10 bit value to our temporary buffer
add r0,r16
in r16,ADCH
adc r1,r16

dec r17
brne LP_GET_ADC ;have we got 4 results yet?

ldi r17,2
LP_ADC_AVE:
lsr r1 ;divide by 4
ror r0
dec r17
brne LP_ADC_AVE

ret ;cool.

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Ha! it's always something obvious... had wiped out the prescaled clock settings when i enabled the ADC!

Doh!