tiny15/tiny85 high speed clock

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Has anyone with a good scope ever taken a look at the actual signal a tiny15 or tiny85 outputs when it's running 'flat out' in PWM mode at it's highest frequency? A tiny15 has a 25.6mhz clock, and the tiny85's is supposed to go up to 64mhz which means they should be able to output 12.8/32mhz PWM signals on the PWM line respectivly, I've heard rough estimates that the rise/fall times on the I/O lines are about 8ns so this is going to end up producing anything but a 50% duty cycle square wave. Does anyone have either of these chips around and want to check it? If anyone has the time to do so could they also list how the line was checked? Specifically the scopes input capacitance/resistance and any other possible stray capacitance/inductance in the test circuit?

-Curiosity may have killed the cat
-But that's why they have nine lives

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No one here in the group has at least a 50mhz scope and a few minutes? Anyone?

-Curiosity may have killed the cat
-But that's why they have nine lives

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It would take a bit of effort to accurately measure rise/fall times of 8ns with a 50MHz scope, so don't expect anyone to take the time, and don't trust the answer if they do. It is not the rise/fall times that affect duty cycle, it is the difference between rising and falling edge times.

I would hardly call it PWM if you intend to cycle at 32MHz. That's a full PWM cycle of only two counts, so the only duty cycles you can have are 0% and 50% and 100%. If you intend to do PWM with say, 256 counts, the rise/fall time differences are probably not a concern as the output frequency is 1/256 of the input clock.

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Not at home on the weekend. ;)

And not all of us play with the AVRs that have the high-speed PWM option.

Lee

You can put lipstick on a pig, but it is still a pig.

I've never met a pig I didn't like, as long as you have some salt and pepper.

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Well, I've got the scope but I don't have any Tiny15's or Tiny85's, otherwise, I'd be happy to give you a hand. If I had the UC's, I could send you the waveforms electronically as, I have a Tektronix SD2012 (100MHz bandwidth) fitted with the storage interface and serial PC communications.

I don't know where you are located and so, I don't know if it would be practicle to send a tiny85 to Cincinnati, Ohio.

Sorry!!!

You can avoid reality, for a while.  But you can't avoid the consequences of reality! - C.W. Livingston

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Actually when transmitting 'flat out' there is no way to alter the pulse width it simply toggles the PWM out pin every time the clock ticks. Thehigh speed PWM is ostensibly for doing 100khz PWM with 8bit resolution (tiny15) The tiny85 ups the frequency max to 64mhz giving 250khz PWM with 8bit resolution. It's not really for PWM though you're correct in that asumption, it's an atempt to directly FM modulate from the PWM output pin by passing the output signal through a tank circuit to a half wave dipole for some simple RF testing. It's never going to see production or even long term use it's merley something I've always wanted to try. I've done spice simulations using roughly guessed AVR I/O pin models with a 50ohm serial resistance (a half wave dipole is supposed to have an radiation resistance of 50 ohms at resonance) and the voltage and current measurements are promising for a couple mw's of power directly from an I/O pin. I need to move from theory to practice though and I have no way of measuring the output directly (I only have a 500khz scope) and I need to be able to see the waveform before I try to build anything because I don't want to produce too much noise, even at just a few mw's I really don't wanna mess anything up nearby even testing.

-Curiosity may have killed the cat
-But that's why they have nine lives

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I think its quite hard to really characterize a signals spectral
properties in that region without taking into account
the relevant parasitics (wiring inductance, couplings, buffer capacitors,...). Probably you not only need a fast scope but also a spectrum analyser.

If you need fast edges and duty-cycle is not so important,
why not feed the signal through a fast gate such as 74AC04
or a 74F04

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I've sent a PM to microcarl, if he can help me my troubles are basically gone. A 100mhz digital storage scope would be absolutly perfect as I can load the waveform into ltspice and do the spectrum analsys at my leasure, better yet I'll be able to feed the ACTUAL signal output into the spice simulation I'm using (simply an inductor and capacitor) The output will be fed directly into an antenna so calculating the parasitics is easy, the only real unknown is how the signal is handled and routed internally in the AVR is going to distort the theoretical output. If all else fails I'll contact my local community college and find out what I have to go through to get access to their electronics lab.

-Curiosity may have killed the cat
-But that's why they have nine lives

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Dont expect too much from that kind of simulation:
The source-impedance at RF of a digital I/O pin surely is not zero.
So injecting a measured voltage into a simulated network may give wrong results !

In RF I have never seen inductors or capacitors, I always
had to cope with lossy resonant circuits. So, be careful, you
may model theory, not reality !

Nevertheless: Good luck !

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Getting a scope trace gets you less than half way to your answer. You'll need to unravel the scope's internal rise/fall times, the probe's loading on the pin, and any PCB routing effects in the test PCB (which might be an STK500 with that trace running all over the place). I'd just wire the thing up and wing it.

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Sceadwian is going to send me a pre-programmed chip. I'll do a point-to-point circuit to ensure a minimum of paracitics. I can also take into account, the probe input characteristics or, I can simply accompany the probe specs with the digital waveforms and Sceadwian can do the calculations himself. In addition, I will be providing a spectrum Analysis, as well. From that, Sceadwian shoud have a pretty good idea if the concept will meet his needs. If not, we can just get a bit more creative, after all...

You can avoid reality, for a while.  But you can't avoid the consequences of reality! - C.W. Livingston

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In RF you've never seen inductors or capacitors? What alternate reality are you from? ;) The tank circuit (an inductor and a capacitor) is a fundamental RF building block. You're right though the scope trace is only half way there.The tests microcarl is going to do for me will be with the PWM pin bent straight up (to avoid as much of the STK500 parasitics as is practical) with a 70 ohm resistor attached to an external ground. That will adequatly simulate a basic half wave dipole. Might try a few other resistor values to get an idea for the output voltage/current under optimal conditions.

-Curiosity may have killed the cat
-But that's why they have nine lives

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Just a comment.
My r.f. theory is very rusty, but don't be suprised if your practical and theoretical measurements do not agree. That's what makes this world fun!

50 ohms isn't a magic number, and at 100kHz a resonant dipole is going to be rather large. A folded dipole increases its impedance, hence 75 ohms for TVs. 370 ohms is the impedance of free space, and there are all sorts of other jumbled memories in my head, few of which make any sense anymore so I'll give up trying to be educated :-)

The main thing is to match impedances of your source and load to get maximum power. It might be worth your while looking into some transmission line theory, as well as antenna theory. For a start it is easier to control with lumped components.

I wish you luck. Topics like this are very interesting and make a nice change.

Edit: OT: The folded dipole thing: Got it wrong (depending on how you look at it). Radiation resistance = 2^2 x 75 = 300 ohms, but I hope you get my drift.

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"with a 70 ohm resistor attached to an external ground. That will adequatly simulate a basic half wave dipole."

No. Your 70 ohm load is highly DC imbalanced and will not behave at all like a dipole, except at one frequency. The AVR pin output will be wideband and a dipole's reactance will have a profound effect on that which a resistor cannot simulate. As you are interesting in modeling this accurately, I'll guess you also know that you'll be violating the AVR maximum pin current driving a 70ohm load, unless you are running a low VCC.

Good luck.

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I think that at this point, Sceadwian is more interested in the output charactistics and overall performance of the microcontroller itself, and if it will perform within the parameters that he is hoping for.

My understanding is that these are only the preliminary stages of the testing of an idea, to see if something is even possible. The results of which, will probably be used to establish further tests.

There is no problem running several tests using various termination resistor values. It is a test, after all... And it's the proper way to go about the discovery process.

And, if Sceadwian plans on driving an antenna from the Tiny`5, more then likely some form of impedance transformation and/or power amplification may be required in the final circuit. But, I suspect Sceawian might already be aware of that.

You can avoid reality, for a while.  But you can't avoid the consequences of reality! - C.W. Livingston

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My apologies if I appeared to be negative wrt this project. It was not my intention. My reaction was piqued by using the AVR to directly drive an rf circuit and I hoped I had some wisdom to spread. I have probably jumped to an unsound conclusion here not knowing the project goals in detail.
Incidentally, I'm currently struggling to control a VCO via PWM using a CD4046. Target frequency is around 500kHz +- a few Hz, counting cycles and comparing against the system clock. Glorious failure so far :-)

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About a year ago I tried synchronizing a CD4046 with OCR1A on a Mega32. Actually, I was attempting to generate a stable matker pulse, once every 1000 pulses. Even with external glue logic, I was not able to do it reliable. I finally went back to keeping tract of the marker pulse within the UC and scrapping the PLL idea.

The problem was a result of the VCO making small variations in the oscilator while attempting to keep the PLL locked. The PLL itself worked really well and followed the UC exactly. It's just that I could not guarantee that the marker pulse arrived soon enough for the PLL to synchronize it into a latching buffer. The output of the PLL was 10X the input and the intrrupt latency just wasn't predictable enough.

Broxbourne, if you're interested, I could share my schematics and code with you. It'll have to be tomorrow though, as it's getting late. Heck, you might spot the problem that I couldn't.

Oh, by the way... I didn't mean to come across as offended. I was only trying to clarify what I think Sceawian is trying to accomplish.

You can avoid reality, for a while.  But you can't avoid the consequences of reality! - C.W. Livingston

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At least, I dont believe in capacitors and inductors anymore:

Some people say, they buffer VCC by 0.1uF. With traces and wires about 10mm long this gives us about 10nH inductance. Together with 0.1uF we ge a a resonant tank at 5MHz. So, dont expect this circuit to behave as a capacitor above 5MHz (is this already RF ?). To assume VCC is "stable" bove some MHZ often is a crude approximation.

I often try to make some hand calculations to see where the esonant-frequencies of components or component-combinations will be. If my frequency is above, I know that I have something to think about....

So proper wiring and so on is an important point and not so easy to model in circuit simulators.

Therefore:
Good luck ! Give it a try, but dont expect to get reality from simulations !

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Actually, every PCB trace is a transmission line at some frequency. Good PCB layout dictates proper placement of despiking capacitors, proper trace width, and proper trace layout. (I.E. no stubs) and proper termination. It would be poor layout to have a driving signal leave an output and go in opposite directions to seperate destinations, without properly terminating the end points, else the reflections may be so great, you the receivers could not determing the real logic condition.

In my days of designing ECL at 100MHz clock frequencies, every signal trace was a transmission line and had to be terminated with a 50 Ohm resistor. At say, 16MHz, the effects of transmission line (or lack there of) isn't as critical. But good grounding and other proper layout methods are esential to reliable operation. Even back then, we had a 0.1 uF despiking capacitor at each IC.

If the despiking capacitor apears to be causing oscilation, I'd be looking at the PCB layout and not the despiking capacitors.

The key points? Big ground areas (and well placed), large power traces, lots of despiking capacitors (at the IC power pins), no transmission line stubs and, in some cases, appropriate signal line termination.

So, don't believe in capacitors, if you want. But you have obviously missed some really important concepts along the way.

You can avoid reality, for a while.  But you can't avoid the consequences of reality! - C.W. Livingston

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I don't think ossi missed any important concepts. Had he worded his statement "I don't believe in pure capacitance and inductance anymore" I think there'd be no argument. You can simulate very well if you have modeled ALL the important parameters. The problem with simulation is that you don't know always know ALL the important parameters. The beauty of trying it is that you do. In the case of an AVR pin, loading it with 70ohms tells you something. Loading it with a dipole might tell you something else. If the simulation only knows about the 70 ohms, it won't show you what a dipole does. If you've got a verified spice model of the AVR pin, you're in better shape than if you've got a scope waveform. But putting a dipole on the pin gets you the real answer, even if it's not the one you want.

If this is a hack, I'd hack it. Thinking is often harder (and less productive) than doing.

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do anybody have a tiny85? I'm searching like crazy, but I can't get one!