TIMER2 in atmega32 (asynchronous timer)

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Any one understand this passage for asynchronous timer?

 

I am living to bring up new earth ,and not to eat and destroy earth.

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Yes.

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Mohamed asaad wrote:
Any one understand this passage for asynchronous timer?

Since the timer is clocked asynchronous (independently) from the system clock, you must have some indication that it has transitioned to the next cycle.

The paragraph above tells you how to know that.

 

Jim

 

 

FF = PI > S.E.T

 

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clawson wrote:

Yes.

 Thereby can you explain please in details.

 

ki0bk wrote:

 

Mohamed asaad wrote:

Any one understand this passage for asynchronous timer?

Since the timer is clocked asynchronous (independently) from the system clock, you must have some indication that it has transitioned to the next cycle.

The paragraph above tells you how to know that.

 

Jim

 

 

I have especial asking about this two sentence , i can't imagine how this case could happen ?

 

  

I am living to bring up new earth ,and not to eat and destroy earth.

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Mohamed asaad wrote:
, i can't imagine how this case could happen ?
Why not? The implication is that the TOSC1 frequency is much lower than F_CPU so quite a few machine cycles could execute within the period of one TOSC1 cycle.

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Why not? The implication is that the TOSC1 frequency is much lower than F_CPU so quite a few machine cycles could execute within the period of one TOSC1 cycle.

But How the interrupt is activated and instructions and other machine cycles are executed?

I am living to bring up new earth ,and not to eat and destroy earth.

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clawson wrote:

Mohamed asaad wrote:
, i can't imagine how this case could happen ?
Why not? The implication is that the TOSC1 frequency is much lower than F_CPU so quite a few machine cycles could execute within the period of one TOSC1 cycle.

 

But How the interrupt is activated and instructions and other machine cycles are executed?

I am living to bring up new earth ,and not to eat and destroy earth.