Timer and time-keeping

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#1
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Hi there. Can someone please shed some light on the following? I am sure I'm making a stupid arithmetic mistake somewhere:

Clock runs at 4.000 MHz
Timer0 overflows at 8 bit resolution, i.e. 256 times per 4MHz
this interrupt is triggered 15625 times per second.

If I have an ISR that increments a counter every time the overflow occurs, then, in theory, every time this counter reaches 15625 a second has passed, and I increment another counter.

Why is the real-life situation out by at least 20%? (slower)

I can manually by trial and error find the right constant, but this wouldn't work in a mass production environment ;)

Am I missing something in the equation?

If I update my LCD in the ISR, will this prevent the timer from updating properly; i.e. will the counter stop incrementing while it's serving the ISR?

I was considering dedicating the ISR purely to the incrementation and timekeeping, and then updating the LCD from the main's idle loop. Will this help?

Thanks in advance!
Andi

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Hi Andi,

it seems, your timer overflows again, until the ISR was finished. So you lost some overflow events, which looks like counting to slow.
Removing the LCD routine from the ISR should help.

Peter

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Why not use the prescaler for timer 0. If you use the prescaler you will have longer time between interrupts and this may give you the time needed for updating the LCD.

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