Section 11.7.3 says:
"In non-inverting Compare Output mode, the Output Compare (OC0x) is cleared on the Compare Match between TCNT0 and OCR0x, and set at BOTTOM."
However tables11-3 & 11-6 say OC is set at TOP for COM0 bits = 10
This is the same in the t25/45/85 datasheet.
In my testing, the output is set at the transition from top to bottom. i.e. running the timer for 1 clock with TCNT0 starting at 255 results in OC set, while running for 1 clock with TCNT0 starting at 254 leaves OC clear.
So both sections are wrong, in non-inverting mode OC is not set at BOTTOM or TOP, it's only set at the transition.
Another thing I figured out when playing with PWM is that in both inverting and non-inverting mode, the OC bit starts as cleared. That means the first cycle (with TCNT0 starting at 0) in non-inverting mode is low for 100% of the time.