Is there an easy way of generating symmetric outputs from a timer on a Mega168? I'm using timer0 at ctc mode to generate a symmetric 100 kHz output at OC0A and OC0B.
I just can't think of a better way than the one below, but even this one is showing a 1 cycle (125 ns @ 8MHz) overlap on both edges. Why are the outputs being updated 1 cycle apart?
#includeint main (void) { // OC0A and OC0B as outputs; DDRD = (1<<PD5) | (1<<PD6); // Setup Timer 0 for CTC @ 100 khz at OC0A OCR0A = 39; TCCR0A = (1<<COM0A0) | (1<<WGM01); // Clear interrupt flags TIFR0 = 0x00; // Start timer0 TCCR0B = (1<<CS00); // wait for the first toggle of OC0A to enable toogle OC0B while( !(TIFR0 & (1<<OCF0A)) ); TCCR0A |= (1<<COM0B0); while(1); }