I have a simple switching circuit intended to swap a pair of 5 volt pulsed signals (PPM) between two destinations. Both signals are 60 Hz, but with different pulse widths. A schematic is attached. The switching is driven by an AVR output pin driving the gate of an NFET(Q1). The drain of the NFET drives the gate of a PFET(Q4) which switches ON/OFF one of the pulsed signals. The other pulsed signal is switched ON/OFF by a second PFET(Q5) driven by the same AVR output pin.
The circuit is intended to swap the signals headed to the ICP1 input on the AVR when it sends the output pin high.
On the attached scope images, the yellow trace is looking at the output drain of Q5 (channel A on the schematic) and the blue trace is looking at the output drain of Q4 (channel B).
When the AVR switch signal is high, Q5 shuts off and Q4 turns on, presenting the Channel B signal to ICP1, as it should. The channel A signal is OFF.
The problem occurs when the AVR switch signal is low. Then, Q1 is OFF, and Q4 should be OFF. Q5 is ON and the channel A pulse is presented to ICP1. But as you can see, an artifact of the Channel B pulse seems to leak through Q4, and both signals end up on ICP1.
I don't know why this is happening, and I wonder whether any of you might.