Spurious IO change..

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Ok I am using AT32UC3A1256 its doing a fair bit of stuff....one of which is monitoring a float switch that is at the end of about 2-3meters lead. Lead is not shielded.

I am not sampling the float IO all the time, only when a query is made through Modbus tcp...I then read the IO and update the Modbus table value just read.

 

At times, throughout the day I see the IO is showing LOW (reported via Modbus table, LOW indicates float switch active) even though there is no water in the underground pit. The IO is pulled up via the micro controller GPIO interface. There is no physical pull-up resistors on PCB. There are two diode clamps and a zenner diode clamping to ground for any voltage spikes. The other two diodes clamp to Vcc and Gnd level...I have enabled the GPER register for the IO and set it as Input type.

 

Any idea folks?

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If you're only reading the input when requested, how do you filter/debounce the input? When you read the input, you're only looking at a window of say 25ns - so a transient can easily give a false reading. Considering you're using the internal pullup resistor and non-shielded cable, then it doesn't take much energy to change the input state. PLCs filter the input and when read via comms, you read the filtered state. This is done for a very good reason.

 

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The datasheet says the chip has 10-15K pull-up...which I thought would have been sufficient (together with diode clamping...).

Ok well I have changed the code to take 8 samples. Sampling interval is 50ms. At the end of capturing 8 samples I divide sum (which I would expect to be 8) by the number of samples (8). So the final status of the IO should be 8/8 = 1 (high) other 0 if there were spurious events. I just have sent the firmware over-the-air....lets observe what happens. Thanks for your input...

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luvocean1 wrote:
The IO is pulled up via the micro controller GPIO interface. There is no physical pull-up resistors on PCB. There are two diode clamps ...
In AofE there are current-limiting resistors for logic gate input protection against ESD :

logic, ESD protection, diode clamps, current limiting resistors

There can be current injection into the supply/ground via the external diode array or via the internal ESD protection.

Most power supplies are not 2-quadrant (source and sink) so there could be an over-voltage resulting in MCU or voltage regulator malfunction (oscillation) or destruction.

An ESD transient will be acceptable for that circuit but EFT or lightning may be a problem.

RFI may be rectified so if enough energy then the buffer's state will briefly change; there's a 3m antenna wink

A cellular phone is a 2 watt transmitter and can destroy electronics.

luvocean1 wrote:
... and a zenner diode clamping to ground for any voltage spikes.
Zeners are relatively soft and slow.

Consider instead a TVS diode that's hard and fast; some TVS diodes are lightning rated.

luvocean1 wrote:
Any idea folks?
UC3A1 does not have an analog comparator; add an external analog comparator.

An analog comparator's common-mode range and rejection is much greater than that of a logic gate.

These can come in very small to tiny packages; might be able to squeeze one onto the board.

Relatively high input impedance so can add some RC for RFI rejection; some analog comparators and operational amplifiers have internal RFI filters.

Alternatively, slow the input signal (from RC of 3ns to RC of 100ns) then restore the edge via a Schmitt-trigger; but, AVR32 UC3A1 GPIO does not have a Schmitt-trigger like an AVR though AVR32 GPIO has an input glitch filter.

Most "slow" discrete signals should be low-pass filtered then edge restored within the MCU; a rule is to only use speed when need speed.

 


http://www.atmel.com/devices/AT32UC3A1256.aspx 

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12.1 CMOS and TTL logic interfacing

page 804

12.1.5 Input protection

Figure 12.21.  Protecting logic inputs from destructive transients:

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A small mixed signal (analog, digital) gate array.

Can enhance what's on a MCU (slow analog comparators to match a MCU's fast comparators, better voltage reference, custom watchdog, etc) :

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Generally, a R and C filter can take a lot of the kick out of a ESD event. Lightning is a bit tougher - you need tranzorbs or varistors for that. 10k at 3V - not much current is flowing. 1k would be getting more reasonable methinks - especially since there's a long cable attached and it is probably outdoors.

With the software filtering I'd normally have a variable counting up/down and a comparison. You can guess how fast the switch should operate normally, so if it starts changing state quicker than you expect then you want to filter that out. Maybe detect this and flag the problem.

Last Edited: Thu. Feb 9, 2017 - 08:34 AM
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I monitor a Door Switch in one of my designs which electrically is almost exactly the same as your application. I have a TVS diode and RC filter as mentioned above.

 

You didn't say whether your pullup is always on or whether you enable it for duration of sampling period only. If the latter you'll certainly need some delay to allow the pin to settle &  reflect the switch state correctly.

 

Between samples  I set the input pin to O/P low to save battery power, however I need approx 40ms delay after turning the pullup on to read a correct switch state.

 

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Thanks a lot guys...it sounds like I should have had an RC network (like the ones used in RESET pins) with the resistor value being around 1K and Cap being 0.1uF. On top of that use diode clamps to Vcc and Gnd and perhaps TVS. All in all...this is at an underground installation and is not easy to get to. So I did software change I noted earlier...and so far so good...no false trigger. :) So the problem is resolved it seems...Hardwarewise all I now have is the diode clamp + Zenner + micro internal pull up (10-15K) active all the time. For future design opt coupler would be the way to go.

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How would an opto resolve the problem? You still need protection and filtering. The opto gives you galvanic isolation at DC. Once the frequency starts rising, then the amount of isolation decreases. For ESD and lightning, they only give limited protection.

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Yes I know that...but optical isolation is another thing I should have considered due to the area where this 2-3 cable is running through...

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After the optocoupler section in AofE is "fiber-optic digital links".

The common TOSLINK is described as inexpensive except to DC (an order of magnitude greater price)

Connector-less is appealing as it's now much less expensive to make custom length fiber optic cables.

There's still the problem of transient protection of power at both ends but that can be solved.

 


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