SPI/ISP/reset oddness with ATMEGA32M1

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Hi there - I'm working on a board that used the ATMEGA32M1. Its SPI peripheral is giving me trouble. Specifically, there are two sets of SPI pins, but only one SPI peripheral. Page 163 says that programming is done on the alternate SPI port. OK cool. But what is the idea behind having a second set of SPI pins? Is it so that you can have complete isolation between your SPI peripherals and your ISP connector?

Additionally... the reset pin is confusing me. PE0 is apparently the reset pin. I remember on some chips there was a fuse to turn off the reset pin - but I don't see anything like that in the fuse bits on this part. Can anybody enlighten me as to how the reset pin on this guy works? I plan on using it for debugwire.

Sorry I'm a bit rusty with AVR hardware design... This is my first AVR board in a good 3 years! Thanks ladies and gentleman!

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Quote:

I remember on some chips there was a fuse to turn off the reset pin - but I don't see anything like that in the fuse bits on this part.

Search the datasheet for RSTDISBL.

Quote:
I plan on using it for debugwire.

Then I don't think you want to use RSTDISBL, do you?

Quote:
But what is the idea behind having a second set of SPI pins?

Alternate pin selection allows you to "uncover" other port functions.
Quote:
• Bit 7– SPIPS: SPI Pin Redirection
Thanks to SPIPS (SPI Pin Select) in MCUCR Sfr, SPI pins can be redirected.
– When the SPIPS bit is written to zero, the SPI signals are directed on pins
MISO,MOSI, SCK and SS.
– When the SPIPS bit is written to one,the SPI signals are directed on alternate SPI pins, MISO_A, MOSI_A, SCK_A and SS_A.
Note that programming port are always located on alternate SPI port.

You can put lipstick on a pig, but it is still a pig.

I've never met a pig I didn't like, as long as you have some salt and pepper.