SPI resistors AVR042

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Hello, I am new to the AVR series micros. A novices learning and using BASCOM - AVR. I read the discussion on this site concerning SPI resistors (Google search). Atmels AVR042 bulletin recommends using resistors between the slave device and an ISP programmer on the same hardware SPI bus lines used by AVR to connect to the slave. In some applications they have recommended values as high as 10K. I was wondering what kind of currents do these data lines see? Does anyone know the real skinny on the effect resistors would have on the SPI bus? I know why Atmel recommends them, I don't understand how reistors in the MOSI/MISO lines could inhibit SPI tranfers???Thanks

Just some guy

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Hi

As long as the AVRISP is not connected or is inactive, the SPI communication between Master (your AVR) and slave will not be affected by the resistors in serie since the current flow is very small. However, when programming the device, AVRISP will first alter the reset line, and second it will begin communication towards your avr mcu, where the mcu now becomes slave, and the AVRISP is master.

If there where other SPI slaves connected to the SPI bus lines several things could happen. one, is that they could start to respond to the message given which was addressed to the avr mcu, and without resistors connected in series as required by AVR042 this could lead to shortcuts (when two spi devices tries to drive the same line in different "directions") or at best, comunication disturbance/interruption which leads to programming failure of your mcu. If adding an resistor in serie the other spi slave must overcom an 10k barrier which by ohms law will reduce its influence in communication btw. AVRISP and AVR mcu towards nothing.

(This is also of special importance where the AVR is the slave and the other spi device is master since there then is two active masters online when the AVRISP is connected, but with series resistors the closest master (which will be the AVRISP) wins.)

Regards
Vidar (Z)

----------------------------------------------------------

"The fool wonders, the wise man asks"

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There was a very recent thread about this. It was something like "low capaciatance resistors". The problem is that at maximum data rates, the series resistros slow the rise and fall times of the clock and data lines. In the appliction reported, the resistors had to be near 1K0 for proper operation at maximum data rates.

Jim

 

Until Black Lives Matter, we do not have "All Lives Matter"!

 

 

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Thanks you both for the help. Jim, I did read the thread regarding a resistors influence on a data line. I found the thread after searching Google for SPI resistors. I must say I found myself wondering who to get behind in the debate. Oh, the life of a newbie!

Just some guy

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Hello - I recently had to deal with the same problem myself. The primary issue is making sure that the SPI device connected to the AVR is not driving the SPI pins (at least that's my understanding of the topic).

Somebody here (can't remember who) made the very wise suggestion to add a pull up resistor to the CS' line, so that it would normally not be selected. I then got rid of the 10K resistors on the MISO, MOSI, and SCK lines and I have had zero problems with programming the board with an AVR ISP at the highest programming frequency.

I'm not sure if this helps or not, but as my issue was so closely related to yours I thought I should post.

Last Edited: Fri. Jan 14, 2011 - 10:50 PM
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Thanks, I visit the MCS Forum and was given the same advice by one of the users. A google search on the subject showed many different unique applications that may require SPI resistors. One was a voltage divider setup they were using for 5 volt to 3 volt TTL level transition. I also found another Atmel document that recommended 330 Ohm resistors for a flash memory expansion. Ideally, I would like to know how level changes on the MO/MI affect current on these lines. Does anyone know? Are we into the "micro" range? Parallax recommends a 33k resistor on all there asynchronous serial I/O lines. I am just trying to understand how logic changes transferred between shift registers at these rates(4mhz and up) translates into something I can "get my arms around" logically (no pun intended). I was also recently given a great tip by the folks on the MCS board to check out the 74HC4053. The chip is a set of CMOS gates that are controlled and selected by the reset line on the ISP. A nifty little setup that I will shamelessly copy!

Just some guy