SPI Peripheral Chip Select Decoding

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Hi guys,

I am using an evk1100 and am interfacing a few SPI peripherals to the spare spi port (SPI0). I have removed 2 0R resistors from the NPCS1 and NPCS2 lines so that I can use those as well as NPCS0. The problem is that I want to add 1 more peripheral and the NCPS3 line is not available as it goes to the SD/MMC socket.

My question is can I use Peripheral Chip Select Decoding (set the PCSDEC bit in the MR register) and use just the NPCS0..2 lines to provide 7 chip selects? The documentation does not mention if this is a valid configuration.

Cheers
Simon.

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Isn't the SD/MMC on SPI1 and selected with SPI1-NPCS1 ?

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Huh, I'm surprised NPCS3 isn't muxed to multiple GPIOs...

The external decoding function should still work even if one of the NPCS lines isn't muxed to an output; at least I don't see any documentation that suggests otherwise. So I would go and give it a try.

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Yes the SD/MMC is on SPI1, but the EVK1100 design uses PA7 (I am guessing as GPIO) for WRITEPROTECT, well that's what the schematics say, and I have traced the pin in the gerber files and it is connected to the SD/MMC socket WP terminal, and the is no 0R resistor anywhere on the trace so it is not so easily disconnected.

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Sorry, I got confused when you mentioned the SD/MMC.

I aggree with mtwieg.

Note though, that in Peripheral Chip Select Decode mode you will only be able to use 2 of the 4 Chip Select Registers, because CRS0 defines the characteristics for the externally decoded devices 0 to 3 and CRS1 for devices 4 to 7.
This will be a problem if you need more that 2 different operating parameters for your 4 devices.

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mtweig,

yes it is muxed to multiple gpio's, but the only other one is in the EBI which is being used for external SRAM.

I will give it a go tomorrow when I can get my hands on a 74HC138 to do the decoding.

If it works I think I should be able to juggle the CSRx issues, even if I have to slow things down a bit on one of the groupings.