SPI init on ATMEGA128?

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Guys

Do I make a correct SPI init on ATMEGA128 ?
My clock is 16Mhz,
what's the clock for SPI (SCK) ?

void spi_init(void)
{
SPCR = 0x52; //setup SPI: Master mode, MSB first, SCK phase low, SCK idle low
SPSR = 0x00;
}

Thank you

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void spi_init(void)
{
    SPCR = (1<<SPE)|(1<<MSTR)|(2<<SPR0); 
    SPSR = (0<<SPI2X);
} 

Looking at "Table 72. Relationship Between SCK and the Oscillator Frequency"
This gives "fosc /64" i.e. 16MHz/64 = 250kHz

Seriously. You go to your data sheet and search for "SPCR" and you will read the relevant explanation(s).

I had to do this myself. After all, who knows what 0x52 might mean ?
If you use the official BIT_NAMES, everything is clear.

Incidentally, you have forgotten the most important part of initialising SPI. Hint. Look at "void SPI_MasterInit(void)" (page 164 of my data sheet)

Even more incidentally, the example omits to make SS pin an output. Thus condemning your AVR to a life of "going haywire".

David.

p.s. I had never looked at the SPI_MasterInit() example. It appears to be the same in other data sheets too. i.e. haywire promoting.

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Ok thanks for the hint

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Did I correctly create a transmit and receive SPI function ?

unsigned char SPI_transmit(unsigned char data)
{
// Start transmission
SPDR = data;

// Wait for transmission complete
while(!(SPSR & (1<<SPIF)));
data = SPDR;

return(data);
}

unsigned char SPI_receive(void)
{
unsigned char data;
// Wait for reception complete

SPDR = 0xff;
while(!(SPSR & (1<<SPIF)));
data = SPDR;

// Return data register
return data;
}

in logic analyzer :

SS on SDcard supposes to be low doesn't it ?

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update logic analyzer after I fix Port B configuration
DDRB = 0xF7; //MISO line i/p, rest o/p

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It does the job on 125KHz but I can't write or read the file yet.

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Seriously. What do you expect to see on such a Logic Analyser trace?
Obviously, no-one here can see anything.

If you want to show the SPI, show one or two bytes. i.e. SS going low, 8 or 16 SCK clock pulses, ...

The Saleae software will even decode the bytes for you. So it will show if you have the SPI mode# correct. It will synchronise to SS going low (or as you have configured Saleae)

Regarding your posted code. Why can't you present it nicely?

unsigned char SPI_transmit(unsigned char data)
{
    // Start transmission
    SPDR = data;

    // Wait for transmission complete
    while(!(SPSR & (1<<SPIF)));
    data = SPDR;

    return(data);
}

The FatFS software will set the /CS line as required. You will normally use the hardware SS pin for this function.

Clearly something is wrong. You appear to have SCK activity even when SS is high.

As a general rule, select a sensible screenshot from Saleae.

David.