SPI idle voltage levels

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#1
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While playing around with SPI, I observed something I found no explanation for:

When setting up the controller (a mega128 in this case, a smaller one wasn´t at hand :) ), all output pins are configured to be LOW. This applies to the SPI pins, too. Then I set up the SPI configuration (clock speed, flag, byte order, etc.). As soon as the SPI is enabled, the MOSI line goes HIGH. Communicating over SPI does work, though.

Is this an intended behavior? The datasheet doesn´t say anything about SPI idle levels (except for the SPI clock, but that is set up properly and does work). Is there some reference to this in another documentation?

Ingo

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Quote:

The datasheet doesn´t say anything about SPI idle levels

It might not SAY much, but isn't a picture worth a thousand words? ;) Figures 77 & 78 & 154 (Rev. M) imply that MOSI idles high.

Lee

You can put lipstick on a pig, but it is still a pig.

I've never met a pig I didn't like, as long as you have some salt and pepper.

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I think it has to to with how you set up the SPI Clock Phase and Clock Polarity. Check tyhe data sheet for values.

Randy

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Hi,

and MISO should be HighZ - I think

Klaus
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Look at: www.megausb.de (German)
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@Lee:

Good point, and I apologize to all for asking. Should have checked the PDF file, but for the recent work on SPI I referred to a printout of the SPI section of the datasheet from some time ago and I obviously missed to print the page with the timing diagram back then. Not checking the original documentation is a severe case of bad enginnering style.

@Klaus:

MISO is indeed set up as Hi-Z, sorry for the misleading description.