Shift instructions and status bits

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#1
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I've identified a discrepancy within the instruction set datasheet (doc0856).

The flags detailed in the instruction set summary differ from those detailed in the individual instruction details for ROR, ROL, LSR, LSL and ASR instructions.

I can't see mention of this in the Errata threads but can't believe it's not been spotted before.

Can anyone help on providing information to what the correct flags are?

Cheers,
Richard

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If you have discovered a discrepancy, why not quote what you think it is.

You can use both the Simulator and JTAG to verify the real-life behaviour.

I must admit that I have never used the Half-Carry flag of an AVR in my life.

David.

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It is the S flag that is not in the doc0856 summary, but is in the individual instruction description. I would trust JTAG over the software simulator for testing.

Just looking at the instruction set summary in an AVR data sheet, the S flag is missing in the instruction summary. The H flag is also missing in LSL and ROL. I'm not surprised if this was never noticed before and if it was noticed I'm not surprised ATMEL never corrected it (ATMEL has a history of eternally ignoring some documentation problems, even when they acknowledge it is a mistake).

One time I used the half carry for some Binary Coded Decimal (BCD) assembly code.

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It's comming up here about once a year, the flags in each datasheet are wrong.
At each instruction in doc856 they are correct, but try to get an old version without Xmega and the new 16 reg AVR's, because that have added to many errors, to the doc.

And now when I'm at it, they have ref. apps to the tiny10 that use reg 0-15 bingo!

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Quote:
It's comming up here about once a year, the flags in each datasheet are wrong.
But the OP did not say that. He said that there is a discrepancy in the instruction set document itself.

Regards,
Steve A.

The Board helps those that help themselves.

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Quote:
But the OP did not say that. He said that there is a discrepancy in the instruction set document itself.

No he say
Quote:
set summary differ from those detailed in the individual instruction

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There are both a summary and descriptions of the individual instructions in the instruction set summary document. At no time did the OP mention, or even imply, individual datasheets.

Regards,
Steve A.

The Board helps those that help themselves.

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What IS the observed discrepancy?

Jim

Jim Wagner Oregon Research Electronics, Consulting Div. Tangent, OR, USA http://www.orelectronics.net

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If I didn't know better I'd have said the OP was one of the regulars trolling us under a newly registered ID. Definitely a case of "light blue touch paper and stand well back..". I wonder why the OP didn't say what the supposed problem was? A deliberate attempt to stir up a hornet's nest perhaps? :-)

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to Jim:
The problem is that the instruction tables in the datasheet for the each AVR and the summary table in doc856 (that show about the samme) the marking if the H and S flag is changed are placed about random (read most often wrong), but for each instruction (in doc 856) the describtion is correct (or at least was).

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Quote:
I must admit that I have never used the Half-Carry flag of an AVR in my life.

Has anyone? Did anyone ever use BCD mode on a 6502?

rcfowle - joined 2005, and finally makes their first post...?

Are they fish(troll)ing, or fowl?

:-)

Cheers,

Joey

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Yes. I used BCD on a 6502.

David.

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Me too - score counter in a Pacman game on Acorn Atom.

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Quote:
Did anyone ever use BCD mode on a 6502?
I think I used it once or twice, but I don't remember the circumstances offhand.

Regards,
Steve A.

The Board helps those that help themselves.

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Quote:
Did anyone ever use BCD mode on a 6502?
ME to, but the ROM in a PET did not! We had a 6502 where the flag that was wrong worked fine in a pet but not in a UK101, it was hard one to find, everybody looked for a bad IO or ...

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joeyAVR wrote:
Quote:
I must admit that I have never used the Half-Carry flag of an AVR in my life.

Has anyone? Did anyone ever use BCD mode on a 6502?
:-)

Bender does. :D
http://www.transbyte.org/SID/SID...

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kscharf wrote:
joeyAVR wrote:
Quote:
I must admit that I have never used the Half-Carry flag of an AVR in my life.

Has anyone? Did anyone ever use BCD mode on a 6502?
:-)

Bender does. :D
http://www.transbyte.org/SID/SID...

Of course!!

Cheers,

Joey

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Saw this thread and couldn't resist. I loved the 6502 and did use BCD mode. Even figured out what some of the unimplemented opcodes did. Some crashed, others had very interesting effects especially with the flags. Don't ask me which ones worked or what they did as that was a few lifetimes ago.

6502 = ADC 02

Larry

"I may make you feel but I can't make you think" - Jethro Tull - Thick As A Brick

"void transmigratus(void) {transmigratus();} // recursio infinitus" - larryvc

"It's much more practical to rely on the processing powers of the real debugger, i.e. the one between the keyboard and chair." - JW wek3

"When you arise in the morning think of what a privilege it is to be alive: to breathe, to think, to enjoy, to love." -  Marcus Aurelius

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Quote:
I must admit that I have never used the Half-Carry flag of an AVR in my life.

It is useful for nibble counters:

if(x==y)
{
 cnt_L++;
}
else
{
 cnt_H++;
}
if(cnt_L==16)... 
if(cnt_H<9)...

This C code "compiles" after proper reenumeration to only three opcodes:

subi cnt,-0x01
cpse x,y 
 subi cnt,+0x01-0x10

plus one opcode for each if() branch after the alternative. SREG_H is for cnt_L, SREG_C is for cnt_H and SREG_Z is for both.

Since SREG_H is an argument only in two opcodes, I wonder if anybody ever seen brbx SREG_H, label in a compiler's output?

EDIT: changed ++ to --

No RSTDISBL, no fun!

Last Edited: Fri. Aug 17, 2012 - 11:48 AM
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Blimey! If you need to count in nibbles on an AVr you ARE pushing the resources envelope :)

Cheers,

Joey

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Guess the 6502 guys were the same dudes that put it in the 6800 first. Only useful for adding 4 bit bcd numbers packed two to a byte.

Imagecraft compiler user

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Wow what a varied and interesting bunch of replies!

Apologies for not responding sooner. I just want to address a couple of points:

-------------
david.prentice> If you have discovered a discrepancy, why not quote what you think it is.

I thought I had provided sufficient information but for completeness the flag information from datasheet doc0856:

ROL summary (Z,C,N,V,H) - ROL details (Z,C,N,V,S,H)
ROR summary (Z,C,N,V) - ROR details (Z,C,N,V,S)
LSL summary (Z,C,N,V,H) - LSL details (Z,C,N,V,S,H)
LSR summary (Z,C,N,V) - LSR details (Z,C,N,V,S)
ASR summary (Z,C,N,V) - ASR details (Z,C,N,V,S)

david.prentice>You can use both the Simulator and JTAG to verify the real-life behaviour.

What confidence can I have in the Simulator if the datasheet is wrong? (Unfortunately I don't have access to a physical device - but agree this would be a good solution)

clawson>If I didn't know better I'd have said the OP was one of the regulars trolling us under a newly registered ID.

Nope - genuine question.

joeyAVR>rcfowle - joined 2005, and finally makes their first post...?

I only occasionally work with AVR and have always been able to find the answer I wanted from historic posts rather than wasting peoples time reposting.

joeyAVR>Are they fish(troll)ing, or fowl?

Making a weak joke on my surname - really?
-------------

So distilling the replies my understanding now is that from datasheet0856 the individual descriptions which include the S flag are correct. Plus datasheets for individual devices are likely to include additional errors such as missing H flags.

Many thanks.

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Simply quoting the 'difference' in your original pos would have been more straightforward. e.g. "the S flag bit is mentioned in the details but not the summary"

Yes. I would agree that you should report the anomaly to Atmel as an Errata.

It says quite clearly that the S bit always reflects the N and V bits. I am not an AVR ASM programmer. I would be very interested in hearing of anyone ever using the S bit.

Regarding the Simulator, provide some test conditions and observe the behaviour. This would be further evidence of an anomaly. e.g. change N or V and see if S is unchanged.

In my experience, the Simulator is very good for reflecting the behaviour of the AVR core. This is an example of the core.

Personally, I would compare the Simulator with the JTAG result. If you do not have JTAG, you simply have to devise your tests, and ask someone here to run the tests.

Regarding 'time wasting': Posting an ambiguous question and then hiding for days is a good example of 'wasting other people's time'. All the same, it is quite fun to see which oldies uses which historic CPU.

@bob,

The 6502 BCD mode was very useful for some applications. The 6502 was a massive advance on the 6800 principally because of the addressing modes. Of course this is all water under the bridge some thirty years later.

David.

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You use the S bit thru the compiler! When you compare signed things.

To OP yes S is allways a function of N and V (unless you set or clr it manually).

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Quote:
Plus datasheets for individual devices are likely to include additional errors such as missing H flags.

From ATTiny2313 rev.I:
    - SREG_S is missing in add,adc,sub,subi,sbc,sbci,com,neg,cp,cpc,cpi,lsl,lsr,rol,ror,asr - SREG_H is missing in lsl,rol.
instruction set description("flags" column).

It seems we are used to bugs in Atmel's datasheets and accepted that SREG_S=(SREG_N!=SREG_V) after arithmetical operations.
My advice is that Instruction Set should be used as reference, not the datasheet.

And documented but "strange" behavior of SREG flags:
https://www.avrfreaks.net/index.p...

No RSTDISBL, no fun!