Setting CPU to 48Mhz and PBA to 12Mhz

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#1
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Hi! I have an EVK1100. Following PM example2 I can set the main CPU clock to 48Mhz using the pll. How can I set the PBA clock to remain 12Mhz?
And, another question: what is the advantage of having PBA @24Mhz? I don't think that perhiperals such as USART, PWM, etc need these kind of speeds...what do i miss?

Thanks!

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If I have understand things right, you just have to change

pm_cksel(pm, 1, 0, 0, 0, 0, 0);

to

pm_cksel(pm, 1, 1, 0, 0, 0, 0);

But I'm still struggling with setting the PLL myself. I think I have understand things, and I think I'm doing things right. But the EVK1100 seems to think differenly :-D

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Thanks, I'm going to try it! What kind of problems do you have with evk pll??

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Try
pm_cksel(pm, 1, 0, 1, 1, 0, 0);

Last Edited: Sun. Dec 16, 2007 - 11:49 AM
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sma wrote:
Try
pm_cksel(pm, 1, 0, 1, 0, 0, 0);

Sure? This way I don't enable divider...isn't it? Thanks

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Yes you're right :-)
pm_cksel(pm, 1, 1, 0, 0, 0, 0); should do it.

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Quote:
Thanks, I'm going to try it! What kind of problems do you have with evk pll??

Serious problems :-D

I have two boards here. One self-designed with an AT32UC3A0512 and the EVK1100. And I have to set the main clock to 48Mhz to work with ethernet. And on the self-designed board everything works fine, but as soon as I set the main clock to 48Mhz on the EVK1100 nothing works anymore.

As soon as I initialize the display or USART or something else, I run into an exception. Debugging that I traced the problem to a semaphore which should be created. And tracing the problem further I end at a call to malloc() but that didn't help me at all.

But at the moment that is not the highest priority so that problem is on the waiting line.

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Did you use the software framework to enable your PLL ?

You should have a look here :

https://www.avrfreaks.net/index.php?name=PNphpBB2&file=viewtopic&t=52699

-roroz

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Quote:
Did you use the software framework to enable your PLL ?

Yes, and tried to copy the whole startup code of the Control Panel. The control panel software works, but my app don't. So I presume it is something really odd, like I have to adjust stack sizes for FreeRTOS or something like that, which has nothing to do with the PLLs but for some strange reason interferes with my PLL settings.

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sma wrote:
Yes you're right :-)
pm_cksel(pm, 1, 1, 0, 0, 0, 0); should do it.

From what I learned from others here helping me is that if you PLL main clock is 48Mhz this will divide that by 2^(1+1)=4 so 48Mhz / 4 = 12Mhz.

But if your using the evk1100 it has a 12Mhz xtal, and If I understand right, what clock would the uart be using if pm_cksel was never set, but the pll is?

Mike

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usart clock is PBA clock, remember PBA is 0..33MHz and PLL clock output is 80..240MHz

-sma

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and if we set main clock to PLL than we should not go higher than 66Mhz... right?

Mike

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yes, use the divider from PM CKSEL register to always have HSB below 66MHz.

-sma

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I thought if we run main clock from PLL we only use the PLL options to divide it. The HSB would be for other perif's and hince would not set PM CKSEL to do that?

just trying hard to learn, forgive my foolishness

Mike

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HSB clock = CPU clock.
Sure you can use the PLL options bit to divide the PLL output as it is in the correct range.

-sma

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ok got it.

Thanks sma.

Mike