SDRAM size

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Hello, the example for the STK1000 SDRAM Size (8 MBytes) is has follows:

  /* setup sdram_size */
  sdram_size = 1 << (SDRAM_COL_BITS + SDRAM_ROW_BITS + SDRAM_BANK_BITS + 2);

The Macros have the following values:
SDRAM_COL_BITS 8
SDRAM_ROW_BITS 11
SDRAM_BANK_BITS 2

However, I am now using the STK1006. So does anyone know how to initalise the SDRAM to the correct size of 64MBytes

Maybe if I set the SDRAM_BANK_BITS to 5 it will work.

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Billy 2 wrote:
Hello, the example for the STK1000 SDRAM Size (8 MBytes) is has follows:

  /* setup sdram_size */
  sdram_size = 1 << (SDRAM_COL_BITS + SDRAM_ROW_BITS + SDRAM_BANK_BITS + 2);

The Macros have the following values:
SDRAM_COL_BITS 8
SDRAM_ROW_BITS 11
SDRAM_BANK_BITS 2

However, I am now using the STK1006. So does anyone know how to initalise the SDRAM to the correct size of 64MBytes

Maybe if I set the SDRAM_BANK_BITS to 5 it will work.

Setting the number of bank bits to 5 will not fix your problem. It will definitely fail to work at all with that modification. By changing it to 5 you are saying there are 2^5 banks, or 32, but in reality you most likely have 4 total banks, or 2 bits. You need to change the number of rows and columns to match your device. Also, you will need to find many other configuration parameters regarding timing, delays, etc. I've found that even in the same family of memory modules some settings will vary, so you should be thorough and check them all.

You can find all of those values in the data sheet for your RAM. The values will depend on the configuration of your memory, e.g. 16M x 8 x 4 (rows*columns x bits per location x banks).

You can look at an example data sheet here. The attached picture is an excerpt from the first page of that document. It shows the row, column, and bank size for various configurations of a 64MB memory module.

As an example, say your memory was in the 8M x 16 x 4 configuration. Your defines would be as follows:

SDRAM_COL_BITS 10
SDRAM_ROW_BITS 13
SDRAM_BANK_BITS 2

I believe the formula you posted is also wrong. The +2 at the end is really another variable that should be (Data_Bus_Width >> 4), not simply 2. Using the numbers from the above example, you would calculate your SDRAM_SIZE like this:

SDRAM_SIZE = (1 << (BANK_BITS + ROW_BITS + COL_BITS + (DATA_BUS_WIDTH >> 4)))
SDRAM_SIZE = (1 << (2 + 13 + 10 + (16 >> 4)))
SDRAM_SIZE = (1 << (2 + 13 + 10 + 1)
SDRAM_SIZE = 1 << 26
SDRAM_SIZE = 0x04000000

It just so happens that 0x04000000 equals 67,108,864, or 64MB, so we know the answer is correct. Change the data bus width to 8 bits and you get 0x02000000 ((1 << 25) instead of (1 << 26)), which is 33,554,432, or 32MB. Because the memory configuration stayed the same except the bus width was cut in half, we expected to get 32MB so the answer makes sense.

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I have problem with my own board with AT32UC3A0512 and MT48LC32M16A2 (SDRAM 64 bytes). The connections are the same as in EVK1105, but in this board is placed 32 bytes SDRAM (MT48LC16M16A2). The example project from ASF works great on EVK1105, but not on my own board. I only changed SDRAM_COL_BITS from 9 to 10. SDRAM Size is 64 Bytes, but after the test program says that: SDRAM tested: 16777216 corrupted word(s). Do I have to change something more except Column Bits?

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I changed also timings according to documentation of MT48LC32M16A2 (75), but still doesn't work.

 

This is my settings:

 

#ifndef _MT48LC16M16A2TG7E_H_
#define _MT48LC16M16A2TG7E_H_


//! The number of bank bits for this SDRAM (1 or 2).
#define SDRAM_BANK_BITS                 2

//! The number of row bits for this SDRAM (11 to 13).
#define SDRAM_ROW_BITS                  13

//! The number of column bits for this SDRAM (8 to 11).
#define SDRAM_COL_BITS                  10 


#define SDRAM_CAS                       3


#define SDRAM_TWR                       18 


#define SDRAM_TRC                       66 


#define SDRAM_TRP                       20 


#define SDRAM_TRCD                      20 


#define SDRAM_TRAS                      44 


#define SDRAM_TXSR                      75 //z 67


#define SDRAM_TR                        7812


#define SDRAM_TRFC                      66

#define SDRAM_TMRD                      2

#define SDRAM_STABLE_CLOCK_INIT_DELAY   100


#define SDRAM_INIT_AUTO_REFRESH_COUNT   2


#endif  // _MT48LC16M16A2TG7E_H_

The rest of code is the same as in example project. Please help if I have to change something more to run 64 bytes SDRAM. 

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I tried change CPU clock from 12 to 66 Mhz, but still nothing. 

SDRAM tested: 
16776999 corrupted word(s)       
217 ok word(s)       

I have this message on UART.