I am trying set up SAML21 to run 48MHz clock. Attached screen shot has my configuration.
XOSC (12MHz) -> GCLK1 (1.5MHz) -> FDPLL (48MHz) -> GCLK0 (48MHz) -> CPU
But the clock fails to initialize with this config. If i change the clock divider on Generic clock generator 0 and bring down the frequency to 24 MHz it works well.
For that matter it works with anything below 24MHz.
System performance level is set to 2 , to operate in PL2 mode.
Could some one help with this.