We have a project that required a higher clock speed so we enabled the DPLL to increase the clock speed from the crystal freq of 12MHz to 48MHz.
This worked ok until environmental testing. At a temperature of 70 DegC the clock failed. When we later warmed the micro to 40 DegC with a controllable hot air gun the clock frequency drifted enough to cause the baudrate of the STDIO output to fail.
We then used the DFLL48M to generate the higher freq with no problems.
Is there a problem with the DPLL?
Is this why all the examples show using the DFLL48M and not the DPLL...
Has anybody else experienced similar problems with the PLL?
The setup for both PLLs used the ASF4.